========================== QD21 DISK CONTROLLER ============================= TECHNICAL MANUAL (MSCP COMPATIBLE) QD2151002-00 Rev G June, 1989 ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ EMULEX PRODUCT/MANUAL REVISION HISTORY ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ PROM E65x(1), Location U44 ÚÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³PROM E65x³ DESCRIPTION ³ MANUAL P/N ³ ÃÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´ ³A,B,C,D ³ QD21 with ³ QD2151001-00, ³ ³ ³ optional diagnostics ³ ³ ³ ³ ³ ³ ³E and ³ QD21 with firmware- ³ QD2151002-00 ³ ³above ³ resident diagnostics ³ ³ ÀÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ This manual has been extensively revised to incorporate changes to support the Firmware-Resident Diagnostics (F.R.D.) that have been added to the Revision E controller firmware PROM. Due to the nature of these firmware changes, a QD21 with a Revision E and above firmware PROM will no longer operate with previously supplied diagnostic software. In addition, some of the ODT functions (NOVRAM loading commands and Format Drive command) previously available are no longer available. All of the functionality that was provided by software diagnostics and ODT commands has been incorporated in F.R.D. Be certain that your manual is appropriate for the revision level of your controller firmware, as noted in the table above. This firmware is easily identified by the label at U44. WARNING This equipment generates, uses and can radiate radio frequency energy, and if not installed and used in accordance with the technical manual, may cause interference to radio communications. It has been tested and found to comply with the limits for a Class A computing device pursuant to Subpart J of Part 15 of Federal Communications Commission (FCC) Rules, which are designed to provide reasonable protection against such interference when operating in a commercial environment. Operation of this equipment in a residential area is likely to cause interference in which case the user at his own expense will be required to take whatever measures may be required to correct the interference. Copyright (c) 1988 Emulex Corporation The information in this manual is for information purposes and is subject to change without notice. Emulex Corporation assumes no responsibility for any errors which may appear in the manual. Printed in U.S.A. (1) The small x indicates the PROM's revision level letter: A, B, C, etc. ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ TABLE OF CONTENTS ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ ONE INTRODUCTION ---------------------------- 1.1 OVERVIEW 1.2 SUBSYSTEM OVERVIEW 1.2.1 Mass Storage Control Protocol (MSCP) 1.3 PHYSICAL ORGANIZATION OVERVIEW 1.4 SUBSYSTEM MODELS 1.5 FEATURES 1.5.1 Microprocessor Design 1.5.2 Firmware-Resident Diagnostics 1.5.3 Custom Configuration Capability 1.5.4 Self-Test 1.5.5 Error Control 1.5.6 Host-Initiated Bad Block Replacement 1.5.7 Seek Optimization 1.5.8 Command Buffer 1.5.9 Adaptive DMA 1.5.10 Block-Mode DMA 1.5.11 Twenty-Two-Bit Addressing 1.6 COMPATIBILITY 1.6.1 Operating Systems 1.6.2 Hardware TWO CONTROLLER SPECIFICATION ---------------------------------------- 2.1 OVERVIEW 2.2 GENERAL SPECIFICATION 2.3 ENVIRONMENTAL SPECIFICATION 2.4 PHYSICAL SPECIFICATION 2.5 ELECTRICAL SPECIFICATION THREE PLANNING THE INSTALLATION ----------------------------------------- 3.1 OVERVIEW 3.2 MSCP SUBSYSTEM CONFIGURATION 3.2.1 Architecture 3.2.2 Peripheral Numbering 3.2.3 Peripheral Capacities 3.3 A DEC MSCP SUBSYSTEM 3.4 THE QD21 MSCP SUBSYSTEM 3.4.1 Logical Unit Numbers 3.4.2 QD21 MSCP Subsystem Logical Configuration 3.4.2.1 Logical Devices 3.4.2.2 Device Numbers 3.5 OPERATING SYSTEMS, DEVICE AND VECTOR ADDRESSES 3.5.1 RSTS/E Operating Systems (V8.0 and above) 3.5.1.1 Adding MSCP Support 3.5.2 Operating Systems (V5.1 and above) 3.5.2.1 Installing a Single MSCP Controller 3.5.2.2 Installing Multiple MSCP Controllers 3.5.2.3 Disk Partitioning 3.5.3 RSX-11M Operating Systems (V4.0 and above) 3.5.3.1 Installing a Single MSCP Controller 3.5.3.2 Installing Multiple MSCP Controllers 3.5.4 RSX-11-MPlus Operating Systems (V2.1 and above) 3.5.4.1 Installing a Single MSCP Controller 3.5.4.2 Installing Multiple MSCP Controllers 3.5.5 MicroVMS Operating Systems 3.5.6 Ultrix-11 Operating Systems (V3.0 and above) 3.5.6.1 Sysgen 3.5.6.2 Special Files 3.5.6.3 Newfs 3.5.6.4 Volcopy 3.5.6.5 Copying a Bootstrap 3.5.7 Ultrix-32 Operating Systems 3.5.7.1 The Kernel 3.5.7.2 Special Files 3.5.7.3 Autoconfigure 3.5.7.4 Disk Partitions 3.5.7.5 Disk Partition Modifications 3.5.7.6 Default Partition Modifications 3.5.7.7 Newfs 3.5.7.8 Suggestions/Warnings FOUR INSTALLATION ---------------------------- 4.1 OVERVIEW 4.1.1 Subsystem Configurations 4.1.2 Dip Switch Type 4.1.3 Maintaining FCC Class A Compliance 4.2 INSPECTION 4.3 DISK CONTROLLER SETUP 4.3.1 Disk Controller Bus Address 4.3.2 Interrupt Vector Address 4.3.3 Options 4.3.3.1 Automatic Bootstrapping 4.3.3.2 MSCP Device Number 4.3.3.2.1 Logical Unit to Boot From 4.3.3.2.2 First Logical Unit Number for an Alternate Address 4.3.3.3 22-Bit Memory Addressing 4.3.3.4 DMA Burst Delay 4.3.3.5 DMA Adaptive Mode 4.4 PHYSICAL INSTALLATION 4.4.1 System Preparation 4.4.2 Slot Selection 4.4.3 Mounting 4.5 ESDI DISK DRIVE PREPARATION 4.5.1 Drive Placement 4.5.2 Sectoring 4.5.3 Drive Numbering 4.5.4 Spindle Motor Spin-up 4.5.5 Termination 4.6 CABLING 4.7 NOVRAM LOADING, DISK FORMATTING, AND TESTING 4.7.1 F.R.D. Conventions 4.7.2 Starting F.R.D. on a MicroVAX I 4.7.3 Starting F.R.D. on a MicroVAX II and a GPX Workstation 4.7.4 Starting F.R.D. on an LSI-11 System 4.7.5 Terminating F.R.D 4.8 F.R.D. OPTIONS 4.8.1 Option 1 - Self-test Loop 4.8.2 Option 2 - Format 4.8.3 Option 3 - Verify 4.8.4 Option 4 - Format and Verify 4.8.5 Option 5 - Data Reliability Test 4.8.6 Option 6 - Format, Verify, and Data Reliability Test 4.8.7 Option 7 - Read Only Test 4.8.8 Option 8 - List Known Units 4.8.9 Option 9 - Replace Block 4.8.10 Option 10 - Display NOVRAM 4.8.11 Option 11 - Edit/Load NOVRAM 4.9 DRIVE CONFIGURATION PARAMETERS 4.9.1 Type Code 4.9.2 Number of Units of this Type 4.9.3 Number of Sectors per Track 4.9.4 Number of Heads 4.9.5 Number of Cylinders 4.9.6 Number of Spare Sectors per Track 4.9.7 Number of Alternate Cylinders 4.9.8 Configuration Bits 4.9.9 Split Code 4.9.10 Cylinder Offset 4.9.11 Starting Head Offset 4.9.12 Removable Media 4.9.13 Gap 0, 1, and 2 Parameters 4.9.14 Spiral Offset 4.10 OPERATION 4.10.1 Indicators FIVE TROUBLESHOOTING ------------------------------- 5.1 OVERVIEW 5.2 SERVICE 5.3 FAULT ISOLATION PROCEDURE 5.4 POWER-UP SELF-DIAGNOSTIC 5.5 FATAL ERROR CODES SIX DEVICE REGISTERS AND PROGRAMMING ------------------------------------------------ 6.1 OVERVIEW 6.2 OVERVIEW OF MSCP SUBSYSTEM 6.3 PROGRAMMING 6.3.1 MSCP Command Support 6.3.1.1 Minimal Disk Subset 6.3.1.2 Diagnostic and Utility Protocol (DUP) 6.4 REGISTERS 6.5 BOOTSTRAP COMMAND SEVEN FUNCTIONAL DESCRIPTION -------------------------------------- 7.1 OVERVIEW 7.2 QD21 DISK CONTROLLER ARCHITECTURE EIGHT INTERFACES -------------------------- 8.1 OVERVIEW 8.2 LSI-11 BUS INTERFACE 8.2.1 Interrupt Priority Level 8.2.2 Register Address 8.2.3 DMA Operations 8.2.3 Scatter/Gather 8.3 QD21 ESDI DISK DRIVE INTERFACE 8.4 FRONT PANEL INTERFACE APPENDICES A AUTOCONFIGURE, CSR AND VECTOR ADDRESSES ------------------------------------------------------- A.1 Overview A.2 Determining the CSR Address for Use With Autoconfigure A.3 Determining the Vector Address for Use With Autoconfigure A.4 A System Configuration Example B PROM REMOVAL AND REPLACEMENT -------------------------------------------- B.1 Overview B.2 Exchanging Proms C DISK DRIVE CONFIGURATION PARAMETERS --------------------------------------------------- C.1 Overview C.2 Parameter Values C.3 Recommended Drive Options C.3.1 Setting the Switches on the CDC Wren III LIST OF FIGURES --------------- 1-1 QD21 Subsystem Configuration 1-2 QD21 Disk Controller 1-3 Sales Order Example 2-1 QD21 Disk Controller Dimensions 3-1 DEC MSCP Subsystem Logical and Physical Configuration 3-2 QD21 Subsystem Logical and Physical Configuration 3-3 Sample SHOW CONFIGURATION 3-4 CONFIGURE Command Listing 4-1 QD21 Configuration Reference Sheet 4-2 Switch Setting Example 4-3 QD21 Disk Controller Assembly 4-4 Drive Cabling 5-1 Fault Isolation Chart 7-1 QD21 Block Diagram 8-1 Control Pin/Signal Assignments at ESDI Disk Drive Interface (Connector J1) 8-2 Data Pin/Signal Assignments at ESDI Disk Drive Interface (Connector J2 or J5) 8-3 Status and Control Interface C-1 Setting the Switches on the Wren III LIST OF TABLES -------------- 1-1 Basic Contents 1-2 QD21 Options 2-1 QD21 General Specifications 2-2 QD21 Environmental Specifications 2-3 QD21 Physical Specifications 2-4 QD21 Electrical Specifications 3-1 Subsystem Configuration Example 3-2 Device Names 4-1 QD21 Switch Definitions and Factory Configuration 4-2 QD21 Jumper Definitions and Factory Configuration 4-3 Controller Address Switch Settings 4-4 Bootstrap MSCP Device Number 4-5 MSCP Device Number for the First Drive Supported by a QD21 at an Alternate Address 4-6 QD21 Internal Cabling Kit (P/N QD2113001) 4-7 Interface and Cable Components 4-8 MicroVAX Offsets 4-9 LSI-11 Offsets 4-10 Configuration Bit Values in Decimal 5-1 Flow Chart Symbol Definitions 5-2 LED Error Codes 5-3 MSCP Fatal Error Codes Used by the QD21 5-4 Fatal Error Codes 6-1 QD21 and SA Registers 8-1 LSI-11 Bus Interface Pin Assignments 8-2 Control and Status Interface Pin Function Description A-1 SYSGEN Device Table A-2 Priority Ranking for Floating Vector Addresses A-3 CSR and Vector Address Example A-4 Floating CSR Address Assignment Example C-1 Drive Configuration Parameter Values C-2 Drive Option Settings C-3 CDC Wren III Switch Settings ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ Section 1 INTRODUCTION ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ 1.1 Overview -------------- The QD21 Disk Controller, designed and manufactured by Emulex Corporation, is a Mass Storage Control Protocol (MSCP) compatible controller that interfaces with Enhanced Small Device Interface (ESDI) disk drives. This manual is designed to help you install and use your QD21 Disk Controller. It assumes that you have some knowledge of hardware configuration, LSI-11 architecture and terminology, and interpretations of error messages and device register contents. The contents of the eight sections and three appendices are described as follows: Section 1 General Description: This section contains an overview of the QD21 Disk Controller. Section 2 Controller Specification: This section contains the specification for the QD21 Disk Controller. Section 3 Planning the Installation: This section contains the information necessary to plan your installation, including MSCP subsystem and operating system considerations. Section 4 Installation: This section contains the information needed to set up and physically install the controller, including switch settings and cabling. It also describes the firmware-resident diagnostics and contains instructions for loading drive configuration parameters into the NOVRAM. Section 5 Troubleshooting: This section describes fault isolation procedures that can be used to pinpoint trouble spots. Section 6 Registers and Programming: This section describes the QD21's LSI-11 bus registers and presents an overview of the Mass Storage Control Protocol (MSCP). Section 7 Functional Description: This section describes the controller architecture. Section 8 Interfaces: This section describes the controller LSI-11 bus and ESDI interfaces. Appendix A Autoconfigure: This appendix describes the DEC algorithm for the assignment of CSR addresses and vector addresses. Appendix B PROM Removal and Replacement: This appendix contains instructions to remove and replace the firmware so that the user can upgrade the QD21 Disk Controller in the field. Appendix C Disk Drive Configuration Parameters: This appendix contains configuration parameters for supported ESDI disk drives. 1.2 Subsystem Overview ------------------------ The QD21 Disk Controller connects high-capacity mass storage peripherals to the LSI-11 bus on computers manufactured by Digital Equipment Corporation (DEC). The QD21 implements DEC's Mass Storage Control Protocol (MSCP) to provide a software-transparent interface for the host DEC computer. To provide traditional Emulex flexibility in peripheral selection, the QD21 uses the industry standard Enhanced Small Device Interface (ESDI) interface as its peripheral interface. The QD21 supports the magnetic disk drive and serial options of ESDI. For more information on the QD21's ESDI interface, see subsection 8.1.3. 1.2.1 Mass Storage Control Protocol (MSCP) -------------------------------------------- MSCP is a software interface designed to lower the host computer's mass storage overhead by offloading much of the work associated with file management into an intelligent mass storage subsystem. In concert with ESDI compatible peripherals, the QD21 provides just such a subsystem. The QD21 relieves the host CPU of many file maintenance tasks. The QD21 Disk Controller performs these MSCP functions: error checking and correction, bad block replacement, seek optimization, command prioritizing and ordering, and data mapping. This last feature is, perhaps, the most important. This feature allows the host computer's operating system software to store data in logical blocks that are identified by simple logical block numbers (LBNs). Thus, the host does not need to have detailed knowledge of the peripheral's geometry (cylinders, tracks, sectors, etc.). This feature also makes autoconfiguration a simple matter. During system start-up, the host operating system queries the subsystem to find its capacity (the number of logical blocks that the subsystem can store). Because the host operating system does not need to have detailed knowledge of its mass storage subsystem, the complexity of the operating system itself has been reduced. This reduction comes about because only one or two software modules are required to allow many different subsystems to be connected to a host. 1.3 Physical Organization Overview ------------------------------------ The QD21 Disk Controller is a modular, microprocessor-based disk controller that connects directly to the host computer's Q-bus backplane. The microprocessor architecture ensures excellent reliability and compactness. The QD21 is contained on a single dual-wide printed circuit board assembly (PCBA) that plugs directly into a Q-bus backplane slot. The QD21 supports up to two physical or four logical disk drives. Aggregate data storage capacities are limited only by the capacities of the peripherals. Figure 1-1 shows one possible ESDI configuration. ÚÄÄÄÄÄÄ¿ ESDI (DATA) ÚÄÄÄÄÄÄÄÄ¿ ³ ³<ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ>³ ESDI ³ ³ ³ ESDI (CONTROL) ³ DISK ³ ÚÄÄÄÄÄ¿ LSI-11 BUS ³ ³<ÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄ>³ DRIVE ³ ³ CPU ³<ÍÍÍÍÍÍÍÍÍÍ>³ QD21 ³ ³ ÀÄÄÄÄÄÄÄÄÙ ÀÄÄÄÄÄÙ ³ ³ ³ ÚÄÄÄÄÄÄÄÄ¿ ³ ³ ÀÄÄÄÄ>³ ESDI ³ ³ ³ ³ DISK ³ ³ ³<ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ>³ DRIVE ³ ÀÄÄÄÄÄÄÙ ESDI (DATA) ÀÄÄÄÄÄÄÄÄÙ Figure 1-1. QD21 Subsystem Configuration ========================================= 1.4 Subsystem Models ---------------------- The QD21 Disk Controller, with appropriate peripherals, provides a DEC MSCP-compatible mass storage subsystem. The QD21 is pictured in Figure 1-2. The QD21 is identified by a top level assembly tag that is glued to the 8031 microprocessor chip on the PWB. The QD21 top level assembly number is given in Table 1-1 along with the part numbers of the items that are delivered with the QD21. Table 1-1. Basic Contents ÚÄÄÄÄÄÂÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ Itm ³ Qty ³ Description ³ Part Number ³ ÃÄÄÄÄÄÅÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´ ³ 1 ³ 1 ³ QD21 Disk Controller ³ QD2110202-00 ³ ³ 2 ³ 1 ³ 22-Bit Addressing Kit ³ QD0113002-00 ³ ³ 3 ³ 1 ³ QD21 Technical Manual ³ QD2151002-00 ³ ÀÄÄÄÄÄÁÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ Options are specified as separate line items on a sales order. An example of an actual sales order is shown in Figure 1-3. Itm ³ Qty ³ Model Number ³ Comment/Description ÄÄÄÄÅÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ 1 ³ 1 ³ QD21 ³ Disk Controller implementing ³ ³ ³ DEC MSCP with ESDI drives Figure 1-3. Sales Order Example ================================ 1.5 Features -------------- The following features enhance the usefulness of the QD21 Disk Controller. 1.5.1 Microprocessor Design ----------------------------- The QD21 design incorporates an eight-bit, high-performance CMOS microprocessor to perform all controller functions. The microprocessor approach provides a reduced component count, high reliability, easy maintainability, and the microprogramming flexibility that allows MSCP to be implemented without expensive, dedicated hardware. 1.5.2 Firmware Resident Diagnostics ------------------------------------- The QD21 disk controller firmware incorporates a self-contained set of disk preparation and diagnostic utilities. These utilities are contained in QD21 Revision E and above firmware. Controllers with this firmware are easily identified by a silver tag labeled with the top assembly number QD2110201-00E. These utilities allow the user to communicate directly with the QD21 via a firmware resident terminal driver that is compatible with either CRT or hardcopy devices connected to an LSI-11 or MicroVAX console port. These firmware-resident diagnostics (F.R.D.) provide several important disk preparation functions, including the ability to: o Configure the controller NOVRAM o Format the drive o Test the disk surface and replace defective blocks, and o Perform reliability testing of the attached disk subsystem. 1.5.3 Custom Configuration Capability --------------------------------------- An on-board NOVRAM can be programmed for two independent physical drive configurations. Using the firmware-resident utilities, you can control drive parameters such as gap size, soft or hard sectoring, and the number of sectors per track. 1.5.4 Automatic Drive Configuration ------------------------------------- This feature allows you to take advantage of the drive configuration information available from the attached ESDI drive to set the drive parameters. You can configure the QD21 to use this information instead of entering the parameters manually. This feature supports both hard and soft sector formats. 1.5.5 Self-Test ----------------- The QD21 incorporates an internal self-test routine which exercises all parts of the microprocessor, the on-board memory, the buffer controller, the disk formatter chip, and the Host Adapter Controller (HAC). Although this test does not completely test all circuitry, successful execution indicates a very high probability that the disk controller is operational. If the QD21 detects an error during self-test, it leaves three light-emitting diodes (LEDs) ON and sets an error bit in the Status and Address (SA) register (base address plus 2) 1.5.6 Error Control --------------------- The disk controller presents error-free media to the operating system by correcting soft errors and retrying operations without intervention by the host 1.5.7 Host-Initiated Bad Block Replacement -------------------------------------------- The QD21 uses DEC-compatible host initiated bad block replacement to dynamically replace any defective blocks that occur during the life of the system. For maximum reliability, the QD21 reports even corrected single bit errors as candidates for replacement. 1.5.8 Media Defect List Management ------------------------------------ During format operations, the QD21 replaces all blocks on the disk that are labeled bad in the Manufacturer's Defect List. After formatting, the firmware- resident utilities can be used to test the entire disk surface with four worst- case data patterns and replace any pattern-sensitive blocks not found by the manufacturer. QD21 supports both 256- and 512-byte defect list formats. 1.5.9 Seek Optimization ------------------------- The QD21 is able to pool the various seeks that need to be performed and determine the most efficient order in which to do them. This is an especially important feature in heavily loaded systems. The disk controller's ability to arrange seeks in the optimum order saves a great deal of time and makes the entire system more efficient. 1.5.10 Command Buffer ----------------------- The QD21 contains a buffer that is able to store 13 MSCP commands. This large buffer allows the subsystem to achieve a higher throughput and to operate at a very efficient level. 1.5.11 Adaptive DMA --------------------- During each DMA data transfer burst, the QD21 monitors the LSI-11 bus for other pending DMA requests and suspends its own DMA activity to permit other DMA transfers to occur. The host processor programs the DMA burst length during the MSCP initialization sequence or the QD21 defaults to 16 words per burst. Because of these adaptive DMA techniques, the QD21 ensures that CPU functions, including interrupt servicing, are not locked out for excessive periods of time by high-speed disk transfers. The QD21 firmware design includes a DMA burst delay of either 4 or 8 microseconds to avoid data late conditions (SW2-7). In addition, the QD21 allows you to modify its DMA operations by disabling the adaptive DMA (SW2-8 ON) and defaulting to burst transfers of 8 words or less. 1.5.12 Block-Mode DMA ----------------------- The QD21 supports block-mode DMA for accessing memory. In this mode, the initial address of the data is transmitted, followed by a burst of up to 16 words of data. The memory address is automatically incremented to accommodate this burst. Block mode transfers considerably reduce the overhead associated with DMA operations. 1.5.13 Twenty-Two-Bit Addressing ---------------------------------- The QD21 supports the 22-bit addressing capability of the extended LSI-11 bus. 1.6 Compatibility ------------------- This subsection describes the compatibility of operating systems and hardware. 1.6.1 Operating Systems ------------------------- The QD21 implements MSCP. Emulex supports its implementation of MSCP beginning with the indicated version of the following DEC operating systems: Operating ³ System ³ Version ÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄ Micro/VMS ³ 4.0 RSTS/E ³ 8.0 RSX-11M ³ 4.1 RSX-11M-PLUS ³ 2.1 RT-11 ³ 5.1 Ultrix-11 ³ 3.0 Ultrix-32m ³ 1.1 1.6.2 Hardware Compatibility ------------------------------ The QD21 Disk Controller complies with DEC LSI-11 bus protocol, and it directly supports 22-bit addressing and block-mode DMA. The QD21 also supports scatter- write and gather-read operations on the MicroVAX I. The QD21 supports the serial mode implementation of the ESDI interface on magnetic disk drives that have clocks up to 15 megaHertz. Emulex has qualified the following disk drives for QD21 support: o CDC Wren III (hard-sectored) o Fujitsu M2246E (soft-sectored) o Hitachi DK512-17 (soft-sectored) o Maxtor EXT-4175 (hard-sectored) o Maxtor EXT-4380 (soft-sectored) o Maxtor XT-4380E (hard-sectored, soft-sectored) o Micropolis 1350 (hard-sectored) o Micropolis 1558 (hard-sectored, soft-sectored) o Siemens 1300 (hard-sectored) The disk drives supported by the QD21 are not media compatible with comparable DEC MSCP products; this is not a problem, however, because of the fixed nature of most DEC drives. ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ Section 2 CONTROLLER SPECIFICATION ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ 2.1 Overview -------------- This section contains the general, environmental, physical, electrical, and port specifications for the QD21 Disk Controller. Subsection ³ Title ÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ 1.2 ³ General Specification 1.3 ³ Environmental Specification 1.4 ³ Physical Specification 1.5 ³ Electrical Specification 2.2 General Specification --------------------------- Table 2-1 contains a general specification for the QD21 Disk Controller. Table 2-1. QD21 General Specifications ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ Parameter ³ Description ³ ÃÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´ ³FUNCTION ³Providing mass data storage to Digital Equipment ³ ³ ³Corporation (DEC) computers that use the LSI-11 ³ ³ ³ ³ ³ Logical CPU Interface ³Emulates DEC's Mass Storage Control Protocol ³ ³ ³ ³ ³ Diagnostics ³Embedded diagnostic ³ ³ ³ ³ ³ Operating System ³Micro/VMS V4.0 and above ³ ³ Compatibility ³RSTE/S V8.0 and above ³ ³ ³RSX-11M V4.1 and above ³ ³ ³RSX-11M-PLUS V2.1 and above ³ ³ ³RT-11 V5.1 and above ³ ³ ³Ultrix-11 V3.0 and above ³ ³ ³Ultrix-32m V1.1 and above ³ ³ ³ ³ ³ CPU I/O Technique ³Direct Memory Access (DMA), including adaptive ³ ³ ³techniques and block mode; supports scatter-write³ ³ ³and gather-read operations on the MicroVAX I ³ ³ ³ ³ ³INTERFACE ³ ³ ³ ³ ³ ³ CPU Interface ³Extended LSI-11 bus interface ³ ³ ³ ³ ³ Device Base Address ³ ³ ³ Standard ³17772150 ³ ³ Alternates ³17772154 ³ ³ ³17760334 ³ ³ ³17760340 ³ ³ ³17760344 ³ ³ ³17760350 ³ ³ ³17760354 ³ ³ ³17760360 ³ ³ ³ ³ ³ Vector Address ³Programmable ³ ³ ³ ³ ³ Priority Level ³BR4 ³ ³ ³ ³ ³ Bus Loading ³1 DC Load, 2.5 AC Loads ³ ³ ³ ³ ³ Peripheral Interface ³ESDI ³ ³ ³ ³ ³ Number of Physical ³2 ³ ³ Disk Drives Supported³ ³ ³ ³ ³ ³ Drive Sectoring ³Hard or Soft Sectored ³ ³ ³ ³ ³ Interface Cables ³34-line control cable (daisy-chain), ³ ³ ³maximum 10 ft (3 m) ³ ³ ³20-line data cables (radial), ³ ³ ³maximum 10 ft (3 m) ³ ³ ³ ³ ³ Disk Drive Mode ³Serial ³ ³ ³ ³ ³ Firmware Diagnostic ³ ³ ³ Host Console ³ ³ ³ ³ ³ ³ LSI-11 ³DLV11J or Processor-resident console interface ³ ³ ³ ³ ³ MicroVAX ³Processor-resident console port ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ 2.3 Environmental Specification --------------------------------- Table 2-2 contains the environmental specifications for the QD21 Disk Controller. Table 2-2. QD21 Environmental Specifications ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ Parameter ³ Description ³ ÃÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´ ³OPERATING ³ 10øC (50øF) to 40øC (104øF), where maximum ³ ³TEMPERATURE ³ temperature is reduced 1.8øC per 1000 ³ ³ ³ meters (1øF per 1000 feet) altitude ³ ³ ³ ³ ³RELATIVE HUMIDITY ³ 10% to 90% with a maximum wet bulb of 28øC ³ ³ ³ (82øF) and a minimum dewpoint of 2øC (3.6øF) ³ ³ ³ ³ ³COOLING ³ 6 cubic feet per minute ³ ³ ³ ³ ³HEAT DISSIPATION ³ 45 BTU per hour ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ 2.4 Physical Specification ---------------------------- Table 2-3 contains the physical specifications for the QD21 Disk Controller. Table 2-3. QD21 Physical Specifications ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ Parameter ³ Description ³ ÃÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´ ³ PACKAGING ³ Single, dual-wide, four-layer PCBA ³ ³ ³ ³ ³ Dimensions ³ 5.186 by 8.70 inches ³ ³ ³ 13.172 by 22.09 centimeters ³ ³ ³ (see Figure 2-1) ³ ³ ³ ³ ³ Shipping Weight ³ 3 pounds ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ 2.5 Electrical Specification ------------------------------ Table 2-4 lists and describes the electrical specification for the QD21 Disk Controller. Table 2-4. QD21 Electrical Specification ÚÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ Parameter ³ Description ³ ÃÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´ ³ POWER ³ 5 Vdc + 5%, 2.6 amperes (A) ³ ÀÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ ÃÄÄÄÄÄÄÄÄ 5.186 inches ÄÄÄÄÄÄ´ (13.172 cm) ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿  ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ 8.700 inches ³ ³ (22.098 cm) ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ À¿ Ú¿ ÚÙ ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÙÀÄÄÄÄÄÄÄÄÄÄÄÄÙ Á Figure 2-1. QD21 Disk Controller Dimensions ============================================ ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ Section 3 PLANNING THE INSTALLATION ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ 3.1 Overview -------------- This section is designed to help you plan the installation of your QD21 Disk Controller. Taking a few minutes and planning the configuration of your subsystem before beginning its installation should result in a smoother installation with less system down time. This section contains QD21 application examples and configuration procedures. The subsections are listed in the following table: Subsection ³ Title ÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ 3.2 ³ MSCP Subsystem Configuration 3.3 ³ A DEC MSCP Subsystem 3.4 ³ The QD21 MSCP Subsystem 3.5 ³ Operating Systems, Device and Vector Addresses 3.2 MSCP Subsystem Configuration ---------------------------------- The following paragraphs describe MSCP Subsystem concepts, including architecture, unit numbering, capacities, and related concepts. 3.2.1 Architecture -------------------- MSCP is a protocol designed by DEC for mass storage subsystems using Digital Storage Architecture (DSA). In a MSCP mass storage subsystem, DSA comprises three functional and physical layers: o Host Layer. An MSCP class-driver in the host system receives requests from the operating system and then relays data and commands to the controller in MSCP message packets. o Controller Layer. The MSCP controller communicates with both the host layer and the mass storage layer. The controller transmits MSCP message packets to and from the host MSCP class-driver and performs data-handling functions for the mass storage devices. The QD21 functions as the controller layer. o Mass Storage Layer. The mass storage peripheral devices communicate with the MSCP controller and send or receive data as specified by the MSCP controller. MSCP defines the form of the message packets that are exchanged by the host and the MSCP controller. The QD21 implements MSCP in mass storage subsystems using ESDI as the peripheral interface. 3.2.2 Peripheral Numbering ---------------------------- Each MSCP peripheral on the system is identified to the operating system by an MSCP device name. An MSCP device name consists of a device class identifier and a unit number. The device class is indicated by a two-letter prefix; MSCP disk devices are indicated by the prefix DU. With the exception of MicroVMS systems, DEC operating systems require that all MSCP peripherals on a system have different MSCP device numbers, even if they are managed by separate MSCP controllers at separate LSI-11 bus device addresses. For example, under RSX-11M-PLUS, if there are three peripherals on the first MSCP controller (at 772150), then the first peripheral on the second MSCP controller (in floating CSR address space) is numbered DU3. 3.2.3 Peripheral Capacities ----------------------------- The capacity of peripherals in an MSCP subsystem is measured in logical blocks. Each logical block contains 512 bytes of data. The MSCP controller can report the capacity of a peripheral to the operating system. For example, a disk drive supported by the QD21 is able to store 280731 logical blocks. 3.3 A DEC MSCP Subsystem -------------------------- Figure 3-1 shows the organization of a typical DEC MSCP subsystem for the LSI-11 bus. The MSCP host and controller functions are combined in a single piece of hardware, in this example the DEC RQDX3. The RQDX3 supports RD51, RD52, or RD53 hard disk drives and the RX50 5.25-inch floppy drive. The RQDX3 plugs directly into the LSI-11 bus and is attached to disk drives via a disk- drive-native interface. ÚÄÄÄÄÄÄÄ¿ ÚÄÄÄÄÄ¿ LSI-11 BUS ÚÄÄÄÄÄÄÄ¿ NATIVE ³ DRIVE ³ ³ CPU ³<ÍÍÍÍÍÍÍÍÍÍ>³ RQDX3 ³<ÄÄÄÄÄÄÄÄÂÄÄÄ>³ DU0 ³ ÀÄÄÄÄÄÙ ÀÄÄÄÄÄÄÄÙ ³ ÀÄÄÄÄÄÄÄÙ ³ ÚÄÄÄÄÄÄÄ¿ ³ ³ DRIVE ³ ÃÄÄÄ>³ DU1 ³ ³ ÀÄÄÄÄÄÄÄÙ ³ ÚÄÄÄÄÄÄÄ¿ ³ ³ DRIVE ³ ÀÄÄÄ>³ DU2 ³ ÀÄÄÄÄÄÄÄÙ Figure 3-1. DEC MSCP Subsystem Logical and Physical Configuration ================================================================== 3.4 The QD21 Subsystem -------------------------- Figure 3-2 illustrates a typical QD21 MSCP subsystem. As with the DEC implementation, the QD21 is connected directly to the LSI-11 bus. The QD21, however, uses the ESDI peripheral interface to communicate with one or two disk drives. ÚÄÄÄÄÄÄ¿ ESDI (DATA) ÚÄÄÄÄÄÄÄÄ¿ ³ ³<ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ>³ ESDI ³ ³ ³ ESDI (CONTROL) ³ DISK ³ ÚÄÄÄÄÄ¿ LSI-11 BUS ³ ³<ÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄ>³ DRIVE ³ ³ ³ ³ ³ ³ ³ DU0 ³ ³ CPU ³<ÍÍÍÍÍÍÍÍÍÍ>³ QD21 ³ ³ ÀÄÄÄÄÄÄÄÄÙ ³ ³ ³ ³ ³ ÚÄÄÄÄÄÄÄÄ¿ ÀÄÄÄÄÄÙ ³ ³ ³ ³ ESDI ³ ³ ³ ÀÄÄÄÄ>³ DISK ³ ³ ³ ESDI (DATA) ³ DRIVE ³ ³ ³<ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ>³ DU1 ³ ÀÄÄÄÄÄÄÙ ÀÄÄÄÄÄÄÄÄÙ Figure 3-2. QD21 Subsystem Logical and Physical Configuration ================================================================ The MSCP subsystem provided by the QD21 is essentially analogous to the DEC MSCP subsystem. As in the DEC subsystem, the QD21 MSCP controller connects directly to the LSI-11 bus. As an MSCP controller, the QD21 receives requests from the host, optimizes the requests, generates ESDI commands to perform the operations, transfers data to and from the host, transfers data to and from the device, and buffers data as necessary. When the command is complete, the controller sends a response to the host. The QD21 also performs all of the functions of the peripheral controller, including serialization and deserialization of data. The QD21 connects to the peripherals it supports via the ESDI interface. 3.4.1 Logical Unit Numbers ---------------------------- As noted in section 3.2.2, most DEC operating systems do not allow any MSCP disk devices on one system to have the same unit number, even though they may be controlled by separate MSCP controllers at different base addresses. DEC MSCP-type drives can accept unit identification plugs that define addresses from 0 to 255. Disk drives controlled by the QD21 do not have this flexibility; the QD21 can detect only two unique drive addresses at its ESDI interface: 1 and 2. To prevent a unit-number conflict between the QD21's drives and another MSCP controller's drives, the QD21 employs switches to change the drive logical unit number that is reported to the operating system. Example 3-1: An MSCP controller at a standard base address supports four disk drives; a QD21 at an alternate base address supports two disk drives. An offset of 4 is specified for the QD21. This causes the QD21 disk with address 1 to be reported to the operating system as logical unit number (LUN) 4. The QD21 disk 2 is reported as LUN 5. The offset for the logical unit number is specified by using switches SW1-2 through SW1-4 on the QD21. See subsection 4.3.3.2.2 for switch setting information. 3.4.2 QD21 Subsystem Logical Configuration ---------------------------------------------- This subsection explains the algorithm used by the QD21 to map logical MSCP peripherals onto the physical disk drives provided by the QD21 subsystem. 3.4.2.1 Logical Devices ------------------------- The phrase "logical MSCP disk drive" refers to the disk drive as it appears to the operating system. That is, the operating system associates a disk drive of known type (in this case, an MSCP disk drive) with a unit number and a capacity. The QD21 MSCP controller presents that information to the operating system after initialization on command. Because the MSCP controller is responsible for establishing the relationship between unit number and capacity, it is possible for the controller to divide its physical disk drives into more than one logical unit. For example, if a physical disk drive has a capacity of 584,000 blocks, the MSCP controller can divide that capacity into two parts of 292,000 blocks each. (Each part may have a different capacity.) Each part is then assigned a separate unit number, and the unit number and capacity of each part is presented to the operating system. The operating system then sees the two parts as separate disk drives, even though the data is actually stored on the same physical drive. The two parts are called logical disk drives, and the numbers that identify them are called MSCP unit numbers. A drive configuration that supports multiple logical units is specified by the data that is stored in the configuration Nonvolatile Random Access Memory (NOVRAM). Information for programming the configuration NOVRAM is given in subsections (4.7, 4.8, and 4.9). The field that causes a drive to be divided into multiple logical units is called the Split Code. There are four types of split codes: no split, cylinder split, head split, and reverse head split: o When no split is specified, the entire physical drive is one logical drive o Cylinder split codes divide a physical drive by cylinders. A Starting Cylinder Offset field in the NOVRAM specifies the first cylinder of the second logical drive. Alternate cylinders are divided evenly between drives. For example, a Maxtor 4380, which has 1224 cylinders might be divided so that the first logical unit is assigned cylinders 0 through 611 and the second logical unit assigned 612 through 1224. In this example, the Starting Cylinder Offset has a value of 612. o Head split codes divide the drive by data heads. A Starting Head Offset field in the NOVRAM specifies the first head of the second logical drive. When the drive is split by data heads, each logical drive has its own platter(s); consequently, the lower blocks of one logical drive are in the same physical cylinder as the lower blocks of the other logical drive. For example, a Maxtor 4380 with 15 heads might be divided so that the first logical unit is assigned heads 0 through 7, and the second logical unit is assigned heads 8 through 14. The Starting Head Offset has a value of 8. o Reverse head split codes also divide the drive by data heads, but assign the lower numbered heads to drive 1 and the higher numbered heads to drive 0. If you entered a reverse split code for the previous Maxtor 4380 example, the first logical unit is assigned heads 8 through 14 and the second logical unit is assigned heads 0 through 7. The Starting Head Offset has a value of 8. The head splitting technique has a performance advantage over the cylinder method. Typically, most disk accesses are made in the lower cylinders of a disk because many system-oriented files are located there, including the drive's directory. Because the low (and high) cylinders are vertically aligned between the two logical drives when the head splitting technique is used, switching between head-split logical drives requires less head movement than switching between cylinder-split drives. 3.4.2.2 Device Numbers ------------------------ The drives supported by the QD21 are assigned MSCP device names by the operating system. As described in subsection 3.2.2, an MSCP device name consists of a device class prefix and a device unit number. Drives are assigned MSCP device numbers beginning with zero (0). The conventions for numbering multiple MSCP drives vary by operating system. Under RSX-11M, RSX-11M-PLUS and RT-11, DU0 is assigned to the first drive on the first MSCP controller, where "first" means the controller located at the standard base address. Unit number 1 would be the second drive on the first controller, etc. If there are two MSCP controllers on the system, the units installed on the second begin numbering at n+1, where n equals the highest unit number of the first MSCP controller. RSTS/E requires that drives supported by a standard MSCP controller be numbered starting at 0 and drives supported by an alternate MSCP controller be numbered starting at 4. Because MSCP device names under MicroVMS designate the supporting MSCP controller, the unit numbering is less restricted. For example, two drives which are supported by a standard MSCP controller might be DUA0 and DUA1 and a third drive supported by an alternate MSCP controller might be DUB0. Table 3-1 is an MSCP unit numbering example under the RSX-11M operating system which shows the MSCP number versus the actual physical addresses assigned to all the components. The physical disk drive (unit number 1) of the second controller is split into two logical units. Note that two device names are associated with that drive. Table 3-1. Subsystem Configuration Example ÚÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÂÄÄÄÄÄÄ¿ ³ ³ ³ Drive ³ ³ ³ QD21 ³ ³ Unit ³Device³ ³ Address ³ Device Description ³ Number³Name ³ ÃÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄ´ ³ 772150 ³ Micropolis 1350 ³ 1 ³ DU0 ³ ³ ÃÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄ´ ³ ³ Micropolis 1350 ³ 2 ³ DU1 ³ ÃÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄ´ ³ 760334 ³ Maxtor 4380 ³ 1 ³ DU2 ³ ³ (Floating) ³ (head split) ³ ³ DU3 ³ ³ ÃÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄ´ ³ ³ Maxtor 4380 ³ 2 ³ DU4 ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÁÄÄÄÄÄÄÙ NOTE All MSCP peripherals supported by the QD21 use the same device identifier - RA81. Section 3 (continued) ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ 3.5 Operating Systems, Device and Vector Addresses ---------------------------------------------------- Before the installation of any peripheral device can be considered complete, the computer's operating system must be made aware of the new resource. The information provided in this section is intended to supplement your DEC operating system resources and to be used as an aid in planning the installation of your QD21. An operating system can be made aware of a new resource in three ways: o The operating system can poll the computer's I/O device address space. o The device can be manually connected using CONNECT or CONFIGURE statements o The user can tell the operating system about a device during an interactive SYSGEN procedure. The first technique is referred to as autoconfigure, and it is essentially automatic. The second technique requires that CONNECT statements be placed in a special command file that is executed each time the computer is bootstrapped. The third technique, interactive SYSGEN, creates a configuration file that the operating system references when the system is bootstrapped. All techniques accomplish the same result: they associate a specific device type with a bus address and interrupt vector. Most recent versions of DEC operating systems use autoconfigure to some extent, and try to follow the same rules. The RT11 operating system does not use autoconfigure, but can locate devices that reside at a standard address. There are some differences among operating systems, however, especially with regard to MSCP controllers at alternate LSI-11 bus addresses. The following paragraphs address these differences for each supported operating system. This discussion includes information on choosing appropriate LSI-11 bus device addresses and interrupt vectors for the subsystem. The following operating system discussions give procedures for choosing LSI-11 bus addresses for the first MSCP controller and any subsequent controllers in the host configuration. No instructions are provided for programming the chosen address into the QD21. See subsection 4.3.1 for detailed switch setting information. MSCP-type controllers contain two registers that are visible to the LSI-11 bus I/O page. They are the Initialization and Polling (IP) register (base address) and the Status and Address (SA) register (base address plus 2). The IP register, the CSR address, LSI-11 bus address and the base address all refer to the same register. All of the operating systems described in the following subsections use the standard LSI-11 bus address of 1772150(8) for the first controller on the host system. Vector addresses for MSCP controllers are not selected by using switches on the controller, but are programmed into the controller during the Initialization process. Many operating systems select the vector address automatically. If an operating system requires manual input of the vector, the procedure notes that fact. Again, although DEC has attempted to standardize treatment of peripherals by operating systems, some differences do exist. Table 3-2 lists and describes the device names assigned to MSCP devices under five operating systems. Two controller names and two drive names are given to indicate the numbering scheme Table 3-2. Device Names ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ Operating System ³ Controller ³ Drives Supported ³ ³ ³ First, Second ³ by First Controller ³ ÃÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´ ³ RSTS/E ³ RU0, RU1 ³ DU0, DU1 ³ ³ RSX-11M ³ --- --- ³ DU0, DU1 ³ ³ RSX-11MPLUS ³ DUA, DUB ³ DU0, DU1 ³ ³ RT-11 ³ Port0, Port1 ³ DU0, DU1 ³ ³ MicroVMS ³ PUA, PUB ³ DUA0, DUA1 ³ ³ Ultrix-11 ³ uda0, uda1 ³ ra0, ra1 ³ ³ Ultrix-32m ³ uda0, uda1 ³ ra0, ra1 ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ The information regarding operating systems in these subsections is subject to change. The following discussions are based on three assumptions: o This is the first pass that is being made through SYSGEN; therefore, no saved answer file exists. Answer N (no) to questions such as "Use as input saved answer file?" o Your host system configuration conforms to the standard LSI-11 device configuration algorithm (otherwise autoconfigure results are not reliable) o You are generating a mapped version of the operating system on the appropriate hardware (unless you are using RT11). 3.5.1 RSTS/E Operating Systems (V8.0 and above) ------------------------------------------------- RSTS/E scans the hardware to determine configuration each time the system is bootstrapped. The scanning program is called INIT.SYS and it relies on the same hardware configuration conventions as do the other DEC operating systems. The RSTS/E operating system can support two MSCP controllers. The first MSCP controller must be located at the standard LSI-11 bus address, 7721508. According to DEC documentation, the second unit should be located in floating address space. For an alternate QD21, Emulex suggests specifying a LSI-11 bus address of 760334(8) using the HARDWARE option of the INIT.SYS program. The INIT.SYS program uses a user-specified table, located in the currently installed monitor, to make exceptions to the autoconfigure algorithm. This table is modified by the HARDWARE option of the INIT.SYS program. Use of this table allows an MSCP controller to be placed at virtually any address on the I/O page. Note that this table must be reset any time a new monitor is installed. Emulex suggests using an LSI-11 bus address of 760334(8) for an alternate QD21. An MSCP controller must be located at the standard address to be a bootstrap device. Interrupt vector addresses are assigned to the MSCP controllers by INIT.SYS and programmed into the devices during initialization. 3.5.1.1 Adding MSCP Support ----------------------------- Support for an MSCP controller must be included in a monitor at SYSGEN time. To include support for an MSCP controller in a RSTS/E monitor, respond to the SYSGEN question "number of MSCP controllers" with the number of MSCP controllers on the system. Units connected to MSCP controllers will be accessible to an online RSTS/E system only after the monitor is successfully SYSGENed and installed with the INSTALL suboption of the INIT.SYS program, and the units have been successfully initialized with the DSKINT suboption of INIT.SYS. 3.5.2 Operating Systems (V5.1 and above) ------------------------------------------ The RT-11 Operating System supports up to four MSCP controllers with up to 256 devices (total) on the four controllers. The following paragraphs discuss the LSI-11 bus and vector addresses for MSCP controllers under RT-11 in host systems with only one MSCP controller and in those with more than one controller. Disk partitioning, a unique feature of RT-11 that is applicable regardless of the number of controllers, is also discussed. 3.5.2.1 Installing a Single MSCP Controller --------------------------------------------- If your host system includes only one MSCP controller, install it with a LSI-11 bus address of 772150(8). RT-11 will find and install the handler (driver) for that controller. In single MSCP controller configurations, it is not necessary to run SYSGEN. You may use one of the pregenerated monitors that are provided with the RT-11 Distribution. Emulex recommends that you modify the system startup command file, STARTx.COM, to properly partition the disk drives. See subsection 3.5.2.3. 3.5.2.2 Installing Multiple MSCP Controllers ---------------------------------------------- If your host system includes more than one MSCP controller, you may either modify the MSCP handler as described in the RT-11 Software Support Manual or perform a SYSGEN. The following procedure describes the SYSGEN technique (user input is in boldface print): 1. Initiate SYSGEN: IND SYSGEN Answer the next group of questions appropriately. 2. Indicate that you want the system to use the startup command file when booting: Do you want the startup indirect file (Y)? Y The startup command file is required to allow additional MSCP controller LSI-11 bus addresses to be specified and to partition the disks consistently when the system is bootstrapped. Answer the next set of questions appropriately. 3. Indicate that you want MSCP support when the Disk Options question appears: Enter the device name you want support for [dd]: DU 4. Indicate the number of MSCP controllers on your system in response to this question: How many ports are to be supported (1)? 2 RT-11 refers to individual MSCP controllers or controllers as ports. Each port has its own LSI-11 bus and vector addresses. 5. Specify support for all other devices in your host system configuration as well. Indicate that there are no more devices by entering a period: Enter the device name you want support for [dd]: . 6. You must specify the addresses of all MSCP controllers (ports) using the SET CSR keyboard command. To ensure that this is done consistently and automatically on power-up, you must add the commands to the system start-up command file, STARTx.COM. The x stands for the monitor that is being used, where x is S, F, or X for single-job, foreground/ background, or extended memory, respectively. Edit the command file to include the following statements: SET DU CSR=772150 (Default) SET DU CSR2=760334 (Floating) SET DU VECTOR=154 (Default) SET DU VEC2=300 The LSI-11 bus for the second device can be any unused address in the I/O page which is supported by QD21 address switch settings; the vector address can be any unused address in the vector page. Default statements are not required. 7. Complete SYSGEN according to the DEC documentation. 3.5.2.3 Disk Partitioning --------------------------- RT-11 is unable to handle drives with a capacity of more than 65,535 blocks (33.5M bytes). To allow drives with larger capacities to be used, RT-11 allows individual physical drives to be partitioned into multiple logical drives. This is done by assigning as many logical drive names (DU0, DU1, etc.) to a physical drive as that drive can support. The statements that make that assignment should be placed in the system start-up command file. This ensures that the drives are automatically partitioned every time the system is bootstrapped and that the partitions are always the same. Use the following procedure to determine the total number of logical drives to be assigned to each physical drive. 1. Determine the drive configuration(s) that you intend to use. You need to know the LUN of each logical drive and the data storage capacity (in logical blocks) of each logical unit. If the QD21 is at an alternate LSI-11 bus address (not 772150), then you must specify an MSCP device number by using switches SW1-2 through SW1-4 (see subsection 4.3.3.2.2). 2. Divide the capacity for each MSCP Unit by 65,535. If the result is a number greater than 1, then that MSCP Unit should be partitioned into multiple logical units. (The last partition on a disk may be smaller than 65,535 blocks.) Round the result up to the nearest whole number. That whole number (up to eight) equals the number of logical disks into which that MSCP unit should be partitioned. 3. You must then include a series of statements in the system startup command file, STARTx.COM, that assigns logical names to each partition. Each statement has the following format: SET DUn UNIT=y PART=x PORT=z where n is the logical device name, y is the physical MSCP unit number, x is the partition number, and z is the controller number (specify the controller number when two or more controllers are present; do not specify the port when only one controller is present). If you partition any drives, you must do this for each partition on each drive, including drives that can hold only one partition. Example: You have selected a Maxtor 4380 that has a capacity of 584,000 blocks. 584,000 ÄÄÄÄÄÄÄ = 8.91 (9 logical units) 65,535 Dividing the unit capacities by 65,535 and rounding the result up to the nearest whole number gives the number of logical units into which each should be partitioned (remember that eight is the maximum). You assign logical names to the partitions, beginning with DU0. For the previous example, the assignments are made as follows: SET DU0 UNIT=0 PART=0 SET DU1 UNIT=0 PART=1 SET DU2 UNIT=0 PART=2 SET DU3 UNIT=0 PART=3 SET DU4 UNIT=0 PART=4 SET DU5 UNIT=0 PART=5 SET DU6 UNIT=0 PART=6 SET DU7 UNIT=0 PART=7 Because this configuration has only one controller, the port is not defined. If you had another controller in this configuration, the controllers would be defined as Port 0 and Port 1. Modify the system startup command file to include the disk partitioning statements. 3.5.3 RSX-11M Operating Systems (V4.0 and above) -------------------------------------------------- RSX-11M SYSGEN is an interrogative program that allows a complete, running RSX-11M system to be configured for a particular hardware environment. SYSGEN is well documented in the RSX-11M System Generation and Installation Guide, and you are expected to rely primarily on that manual. This explanation is provided only to remove some ambiguities that the installation of the QD21 may present SYSGEN supports autoconfigure, and MSCP controllers are detected by autoconfigure. However, autoconfigure detects only the MSCP controller that is located at the standard LSI-11 bus address. Additional MSCP controllers at alternate addresses must be attached to the operating system manually. NOTE If the QD21 controls the system disk, you must select 22-bit addressing (SW2-6 ON) even if your system has only 256K bytes of memory. 3.5.3.1 Installing a Single MSCP Controller --------------------------------------------- If you have only one QD21, install it at the standard address (772150) and use autoconfigure to connect your peripherals. The procedure given in the RSX-11M System Generation and Configuration Guide is adequate for this purpose. 3.5.3.2 Installing Multiple MSCP Controllers ---------------------------------------------- If you have two MSCP controllers, say a DEC MSCP controller and a QD21, you must perform a complete manual initialization. We recommend that the DEC MSCP controller be installed at the standard LSI-11 bus address. Locating the QD21 at the alternate LSI-11 bus address does not prevent its being used as the system device. Both MSCP controllers are connected to the operating system by using the following procedure. 1. Invoke SYSGEN. > SET /UIC=[200,200] > @SYSGEN 2. To indicate that you want to use autoconfigure, answer Y (yes) to the following question: * Autoconfigure the host system hardware? [Y/N]: Y 3. To indicate that you do not want to override autoconfigure results, answer N (no) to this question: * Do you want to override Autoconfigure results? [Y/N]: N Answer the rest of the questions in the SETUP section appropriately, and continue to the next section, TARGET CONFIGURATION. In TARGET CONFIGURATION, the defaults presented for the first group of questions should be accurate for your system because autoconfigure was requested. 4. In response to the question regarding devices, indicate that you have two MSCP-TYPE controllers: * Devices: DU=2 Devices: . This entry supersedes the value of 1 that autoconfigure has determined. Typing a period (.) terminates device input. Continue through the next four sections, HOST CONFIGURATION, EXECUTIVE OPTIONS, TERMINAL DRIVER OPTIONS, and SYSTEM OPTIONS, answering questions appropriately. 5. When you reach the PERIPHERAL OPTIONS section, SYSGEN asks you questions that pertain only to the MSCP devices on your system. (Unless you indicated that you wished to override other autoconfigure results when you responded to the Devices question, SYSGEN asks questions on those devices.) The first question requests information about the controller's interrupt vector address, LSI-11 bus address, the number of DU-TYPE disk drives (there is no default value for this parameter), the number of command rings, and the number of response rings. The question is asked twice, once for controller 0 and once for controller 1, because we have specified two DU-TYPE controllers. The dialog uses the abbreviation contr to indicate controller. * DU contr 0 [D:154,172150,,4,4] 154,172150,3,4,4 The standard vector address for MSCP controllers is 154. The vector for a second unit should be allocated from floating vector address space. Any unused vector between 300 and 774 can be allocated. See Appendix A for a description of DEC's algorithm for assigning floating vectors. The standard LSI-11 bus address for MSCP controllers is 772150. Emulex recommends that the second unit be located in floating LSI-11 bus address space. See Appendix A for a description of the DEC algorithm for assigning floating addresses. The number of DU-TYPE disk drives depends on the configuration that you have selected for the QD21, or on the number of drives that are attached to a DEC MSCP controller. When you select a configuration for the QD21, you are taking into account the number of physical disk drives that you are attaching to the QD21's ESDI interface. When you select a configuration, you are also specifying a logical arrangement for the QD21 MSCP subsystem. Some configurations split one physical drive into two logical drives to make file management easier. You determine the configuration of each ESDI disk drive when you program the QD21's NOVRAM; see subsections 4.7, 4.8, and 4.9. The following types of disk drives can be attached to DEC MSCP controllers: o RX50 o RD51 o RD52 o RD53 o RC25 o RA60 o RA80 o RA81 The RX50 drive contains two 5.25-inch floppy diskettes; count an RX50 as two drives. The RC25 has both fixed and removable hard media; count an RC25 as two drives. RSX-11M supports up to eight command and eight response rings; the number of command and response rings that you specify depends on your application. Four command and four response rings are reasonable and adequate for most applications. 6. SYSGEN then asks you to specify the type of disk drive(s) on each controller: * DU contr 0 unit 0. is an RA60/80/81/RC25/RD51/RX50 [D:RA81]RD51 For the DEC MSCP controller, indicate the appropriate peripherals. For the QD21, indicate that you have one RA81 for each logical disk drive RSX-11M does not tolerate gaps in sequence; the unit numbers must be contiguous. In addition, the unit numbers specified for each controller must be the same as those reported by the controller during initialization. 7. Complete the SYSGEN procedure according to DEC documentation. 3.5.4 RSX-11M-PLUS Operating Systems (V2.1 and above) ------------------------------------------------------- RSX-11M-PLUS SYSGEN is an interrogative program that allows a complete, running RSX-11M-PLUS system to be configured for a particular hardware environment. Sysgen is well documented in the RSX-11M-PLUS System Generation and Installation Guide, and you are expected to rely primarily on that manual. This explanation is provided only to remove some ambiguities that the installation of the QD21 may involve. SYSGEN supports autoconfigure, and MSCP controllers are detected by autoconfigure. However, autoconfigure detects only the MSCP controller that is located at the standard LSI-11 bus address. Additional MSCP controllers at alternate addresses must be attached to the operating system manually. 3.5.4.1 Installing a Single MSCP Controller --------------------------------------------- If you have only one QD21, install it at the standard address (772150) and use autoconfigure to connect your peripherals. The procedure given in the RSX-11M-PLUS System Generation and Configuration Guide is adequate for this purpose. 3.5.4.2 Installing Multiple MSCP Controllers ---------------------------------------------- If your initial system configuration includes two MSCP controllers, connect the alternate MSCP controller to the operating system during the initial SYSGEN. We recommend that you use autoconfigure to connect the first controller at the standard address (772150). We recommend that the DEC MSCP controller be installed at the standard LSI-11 bus address; locating the QD21 at the alternate LSI-11 bus address does not prevent its being used as the system device. If you are adding the second MSCP controller to the system configuration, use the Add a Device option of SYSGEN or a complete SYSGEN. The following procedure describes the Add a Device process (user input is in boldface print): 1. Invoke SYSGEN. > SET /UIC=[200,200] > @SYSGEN 2. To indicate that you want to do a subset of the SYSGEN procedure, answer N (no) to the following questions: * Do you want to do a complete SYSGEN? [Y/N D:Y]: N * Do you want to continue a previous SYSGEN from some point? [Y/N D:Y]: N 3. To indicate that you want to execute a specific module of the SYSGEN procedure, answer Y (yes) to this question: * Do you want to do any individual sections of SYSGEN? [Y/N D:Y]: Y 4. Select the Add a Device section of SYSGEN: * Which sections would you like to do? [S R:0.15.]: H Type the letter H to select the Add a Device section. SYSGEN now asks you all of the questions in the Choosing Peripheral Configuration section. The questions that SYSGEN asks pertain to the type and number of controllers that are installed on your system. There is one question for each type of controller that RSX-11M-PLUS can support. Answer 0 (zero) for all types of controllers until you are prompted for the number of UDA-TYPE devices. 5. When you are asked to specify the number of MSCP-type devices, answer appropriately: * How many MSCP disk controllers do you have?[D R:0.63. D:0.] 2 6. Give the total number of MSCP disk drives (on all controllers) installed on the system. * How many MSCP disk drives do you have? [D R:0.n. D:1.] 5 The answer to this question depends on the configuration that you have selected for the QD21 and on the number of drives that are attached to any DEC MSCP controllers. When you select a configuration for the QD21, you are taking into account the number of physical disk drives that you are attaching to the QD21's ESDI interface. When you select a configuration, you are also specifying a logical arrangement for the QD21 MSCP subsystem. Some configurations split one physical drive into two logical drives to make file management easier. You determine the configuration of each ESDI disk drive when you program the QD21's NOVRAM (see subsections 4.7, 4.8, and 4.9). The following types of disk drives can be attached to DEC MSCP controllers: o RX50 o RD51 o RD52 o RD53 o RC25 o RA60 o RA80 o RA81 The RX50 drive contains two 5.25-inch floppy diskettes; count an RX50 as two drives. The RC25 drive has both fixed and removable hard media; count an RC25 as two drives. 7. SYSGEN then asks you to specify controllers per disk drives. * To which DU controller is DU0: connected? [S R:11]: A This question is asked as many times as the number of MSCP drives that you have indicated are on the system. RSX-11M-PLUS does not tolerate gaps in sequence; the MSCP unit numbers must be contiguous. In addition, the unit numbers specified for each controller must be the same as those reported by the controller during initialization. Use A for the primary controller and B for the alternate controller. 8. Enter the vector address for each MSCP controller: * Enter the vector address of DUA [O R:60774 D:154] The standard vector address for MSCP controllers is 154. The vector for a second unit should be allocated from floating vector address space. Any unused vector between 300 and 774 can be allocated. See Appendix A for a description of DEC's algorithm for assigning floating vectors. 9. Enter the CSR address for each MSCP controller: * What is its CSR address? [O R:160000177700 D:172150] The standard CSR address for MSCP controllers is 772150. Emulex recommends that the second unit be located in floating CSR address space. See Appendix A for a description of the DEC algorithm for assigning floating addresses. 10. Specify the number of command rings for each MSCP controller: * Enter the number of command rings for DUA [D R:1.8. D:4.] 4 RSX-11M-PLUS supports up to eight command rings. The value you specify depends on your application. Four command rings are reasonable and adequate for most applications. 11. Specify the number of response rings for each MSCP controller: * Enter the number of response rings for DUA [D R:1.8. D:4.] 4 RSX-11M-PLUS supports up to eight response rings. The value you specify depends on your application. Four response rings are reasonable and adequate for most applications. 3.5.5 MicroVMS Operating Systems ---------------------------------- MicroVAX/MicroVMS supports MSCP controllers at the standard address, 772150, and in floating address space. MicroVMS has a software utility called SYSGEN which can be used to determine the LSI-11 bus address and interrupt vector address for any I/O devices to be installed on the computer's LSI-11 bus. A running MicroVAX/MicroVMS computer system is required in order to use this utility. If you do not have access to a running system, you must determine the LSI-11 bus addresses and vector addresses manually (although autoconfigure can still be used to connect the devices to the computer automatically on powerup). See Appendix A for a description of the algorithm used by SYSGEN to determine LSI-11 bus addresses. The following procedure tells how to use MicroVMS SYSGEN to determine LSI-11 bus addresses and interrupt vectors. 1. Log in to the system manager's account. Run the SYSGEN utility: $ RUN SYS$SYSTEM:SYSGEN SYSGEN> The SYSGEN> prompt indicates that the utility is ready to accept commands. 2. Obtain a list of devices already installed on the MicroVAX LSI-11 bus by typing: SYSGEN> SHOW/CONFIGURATION Name: PUA Units: 1 Nexus: 0 CSR: 772150 Vector1: 154 Vector2: 000 Name: TTA Units: 1 Nexus: 0 CSR: 760100* Vector1: 300* Vector2: 304* Name: TXA Units: 1 Nexus: 0 CSR: 760500* Vector1: 310* Vector2: 000 *Floating address or vector Note: All addresses and vectors are expressed in octal notation. Figure 3-3. Sample SHOW CONFIGURATION ====================================== SYSGEN lists by logical name the devices already installed on the LSI-11 bus. Make a note of these other devices with floating addresses (greater than 760000) or floating vectors (greater than 300) that you plan to reinstall with your QD21. 3. To determine the LSI-11 bus addresses and vectors that autoconfigure expects for a particular device type, execute the CONFIGURE command: SYSGEN> CONFIGURE DEVICE> Specify the LSI-11 bus devices to be installed by typing their LSI-11 bus names at the DEVICE prompt (the device name for MSCP controllers under MicroVMS is UDA). DEVICE> UDA,2 DEVICE> DHV11 DEVICE> DZ11 A comma separates the device name from the number of devices of that type to be installed. The number of devices is specified in decimal. In addition to the QD21, you need only specify devices that have floating addresses or vectors. Devices with fixed addresses or vectors do not affect the address or vector assignments of devices with floating addresses and vectors. 4. Indicate that all devices have been entered by pressing the and Z keys simultaneously: DEVICE> ^Z SYSGEN lists the addresses and vectors of the devices entered in the format shown in Figure 3-4. SYSGEN> CONFIGURE DEVICE> DZ11 DEVICE> DHV11 DEVICE> UDA,2 DEVICE> ^Z Device: UDA Name: PUA CSR: 772150 Vector: 154 Support: yes Device: DZ11 Name: TTA CSR: 760100* Vector: 300* Support: yes Device: UDA Name: PUB CSR: 760354* Vector: 310 Support: yes Device: DHV11 Name: TXA CSR: 760500* Vector: 320 Support: yes *Floating address or vector Note: All addresses and vectors are expressed in octal notation. Figure 3-4. CONFIGURE Command Listing ====================================== 5. Note the CSR addresses listed for the LSI-11 bus devices in floating address space. Program the listed addresses into non-Emulex devices as instructed by the manufacturer's documentation. For the QD21, program the address given for the QD21 (lowest numerical address) into the board as described in subsection 4.3.1. 6. Complete SYSGEN according to the DEC documentation. If you want to select a nonstandard address for the QD21, that is one that differs from the address selected by the CONFIGURE command, you must enter CONNECT statements in the SYCONFIG.COM file that is in the system manager's account, SYS$MANAGER. Use the syntax of the CONNECT statements as described in the DEC documentation on MicroVMS SYSGEN. NOTE Do not alter the STARTUP.COM or UVSTARTUP.COM command files in the main system account, SYS$SYSTEM. 3.5.6 Ultrix-11 Operating Systems (V3.0 and above) ---------------------------------------------------- The Ultrix-11 Version 3.0 system supports up to a total of four MSCP disk controllers, but only one of each type of controller. Therefore, to add support for two MSCP controllers, the system generation procedure must be told that there is, for example, one UDA50 controller and one RQDX1 controller. The choices are: Controller name device name disk name UDA50 ra ra?? KLESI rc rc?? RQDX1, RQDX2, or RQDX3 rq rd?? RUX1 rx rx?? NOTE A bug exists in version 3.0 that prevents actually using more than three controllers. When an RQDX1, RQDX2, or RQDX3 is specified, the sysgen program will not allow specifying an RUX1 controller, and vice versa. 3.5.6.1 Sysgen ---------------- To add a device to an Ultrix-11 kernel, the sysgen program must be run to create and make a new kernel. Creating a kernel involves the creation of a configuration file and then "making" the kernel from this configuration file. A dialogue mode is used to enter various system parameters. The question: Disk controller type: ? asks for the specification of a disk controller. You must choose a different controller type for each MSCP controller on your system, even if they are all QD21s. NOTE The order in which you enter each controller is very important. The order becomes the controller number. The same order must also be used when creating the special files (see below). For each MSCP controller specified, one of the following statements will be typed: First MSCP controller type: Second MSCP controller type: Third MSCP controller type: and, depending on the controller name specified previously, the next question will differ. See the appropriate correlation below: Disk Controller Type Next Sysgen Question uda50 or kda50 Drive 0 type ? klesi Drive 0 type ? rqdx1/2/3 or rux1 Drive 0 type ? Note that it doesn't matter which drive type you choose. Just enter one of the supplied names for each drive you have connected to each controller. The next two questions refer to the controller's CSR and vector addresses: CSR address <172150> ? Vector address <154> ? The defaults for the CSR and Vector address will always be 172150 and 154, respectively. Be sure to enter the correct CSR value. Since the MSCP controller accepts a software-defined vector, an unused vector from the floating address space should be used for all nonstandard address controllers. Emulex suggests that you use a decrementing (by 4) vector address starting at 700 (octal). This will prevent you from using a vector address that is already in use. 3.5.6.2 Special Files ----------------------- The Ultrix operating system communicates with devices on the system by the use of special files. These files contain pointers into a system table that lists the entry points for a corresponding driver for that device. There must be a special file for each device (and each partition for disks) on the system in order for Ultrix to communicate with that device. Some devices will have two special files associated with a device: one for use with character mode, and the other for block mode. These special files exist in the account "/dev". The special files for Ultrix-11 are created with the 'msf' program (make special file). If no options are supplied, this program enters a dialogue mode: # /etc/msf The "msf" program will issue the prompt: Command : Use the "c" command to create the special files. Device name (? for help) : The "msf" program does not understand the notations for different controller types. Instead, it uses the device name and controller number in order to create the special files. For example, the special files for ra60, ra80, and ra81 would be "ra", the special file for an rc25 would be "rc", and the special files for an rd51/2/3 would be "rd". Therefore, you must enter a unique device name for each controller. It is suggested that you use the same device names used previously with the sysgen program. The next two questions are: MSCP controller number <0 1 2 3>: Unit number <0 -> 7 or all>: The MSCP controller number assigned to each controller is determined by the order in which you entered the devices to the sysgen program; that is, the number for the first controller is 0. The unit number for each drive (as it is identified by SW1-2 through SW1-4) must match the drive's specification in the configuration file. In addition, the drive to be booted from must be 0, regardless of whether the controller is at the standard or an alternate address. For ra, rc, and rd type devices, the next question will be asked: Assume standard disk partitions (? for help) ? If you answer "no", the next question will be asked: Create partitions <0 -> 7 or all>? You should always answer "all". 3.5.6.3 Newfs --------------- The "newfs" program is used to create file systems on specified partitions. The newfs program requires no arguments and immediately enters a dialogue mode. See the Ultrix-11 System Manager's Guide for more information on newfs. 3.5.6.4 Volcopy ----------------- Once a device is configured into your current kernel, you can copy an existing file system onto a new partition with the 'volcopy' program. The new partition will be created with the identical size parameters of the original file system. See the Ultrix-11 System Manager's Guide for more information on volcopy. 3.5.6.5 Copying a Bootstrap ----------------------------- A new bootstrap can be copied onto a new system disk with the "dd" program. The command: # dd if=/mdec/rauboot of=/dev/ra00 will copy the bootstrap file onto block zero of ra0. NOTE V7M-11 V1.0 and Ultrix-11 V2.0 did not support self-sizing disks and are, therefore, unusable with the Emulex MSCP controllers. 3.5.7 Ultrix-32 Operating Systems ----------------------------------- The Emulex MSCP class disk disk subsystems emulate the DEC DSA UDA-50/KDA-50/ RA81 (MSCP) disk subsystem. They report that they are of controller type "DU" and of device type "RA81". However, when asked for the number of logical blocks they do not return a size value that matches that of a "real" DEC RA81. 3.5.7.1 The Kernel -------------------- Support for MSCP controllers must be included in a monitor when rebuilding the kernel. The configuration file is edited to reflect the number of controllers and the number of drives connected to each controller. The Ultrix-32 system supports two MSCP disk controllers. Ultrix-32 does not require that the units be in sequential order. However, the MSCP device number for the drive to be booted from MUST be 0 regardless of the controller's LSI-11 bus address. Further, be certain that the MSCP device number of each drive (as it is identified by SW1-2 through SW1-4) matches the drive's specification in the configuration file. The following example shows two controllers, the first with two drives, the second with one: controller uda0 at uba0 csr 0172150 vector udintr disk ra0 at uda0 drive 0 disk ra1 at uda0 drive 1 controller uda1 at uba0 csr 0160334 vector udintr disk ra2 at uda1 drive 2 In this example, the first unit on the second controller must be MSCP device number two regardless of the units on the first controller. 3.5.7.2 Special Files ----------------------- The Ultrix operating system communicates with devices on the system by the use of special files. These files contain pointers into a system table that lists the entry points for a corresponding driver for that device. There must be a special file for each device (and each partition for disks) on the system in order for Ultrix to communicate with that device. Some devices will have two special files associated with a device: one for use with character mode, and the other for block mode. These special files exist in the account "/dev". There is a shell script, called "MAKEDEV" (uppercase important), on the Ultrix- 32 system to help build these special files. The format of this command is: % /dev/MAKEDEV device ... This script passes your input to the program "mknod" to create the special files. You should use this command file to create the special files for each disk you wish to connect to the system. An example for two disks is: % /dev/MAKEDEV ra4 ra5 This example assumes that you have already added the device into the configuration file, and you chose the logical names ra4 and ra5 for your disks. 3.5.7.3 Autoconfigure ----------------------- At boot time, Ultrix-32 attempts to auto-configure the devices included in the booted monitors configuration file. If the device was not included in the configuration files, it will not be configured into the running system. If the device is not present, Ultrix will skip it. When Ultrix finds a device at autoconfigure time it prints a message as follows rqd0 at csr 172150 vec 774, ipl 17 ra0 at rqd0 slave 0 ra1 at rqd0 slave 0 rqd1 at csr 160334 vec 770, ipl 17 ra2 at rqd1 slave 0 The CSR address were set in the configuration file. The vectors are assigned sequentially in reverse order by the operating system. If the CSR or unit numbers don't match the configuration file, the device will be skipped (and no message will be printed). 3.5.7.4 Disk Partitions ------------------------- Ultrix allows a user to logically subdivide a disk into sections called "partitions". Disk partitions were created because the first Unix operating systems could access only a limited amount of space on large disks. Disk partitioning lets several Unix file systems reside on the same disk, one file system per partition. This allows the operating system to utilize the entire disk. Each disk has a partition table that defines the starting location and size (both in blocks) of each partition on that disk. When a disk is opened by the operating system (for the very first time), it writes the partition size table into the super block of partition "a" (the first partition) on the disk. 3.5.7.5 Disk Partition Modifications -------------------------------------- Modifications to a disk's partition table is done with the "chpt" command each time a disk is initialized or reinitialized. The "chpt" command allows a system manager to alter a particular partition's location and size characteristic. The operating system initializes the disk's partition table with that of a real DEC RA81's size table (found in the disk driver) on its first opening. The system manager should then edit these sizes (with "chpt" command) to match the system needs. 3.5.7.6 Default Partition Modifications ----------------------------------------- It is also possible to modify the default RA81 partition size table, which is stored in the device driver; this would eliminate the need for editing the partition table each time the disk is initialized. When DEC reorganized the Berkeley 4.2 Unix system to create Ultrix-32, they set it up to allow the distribution of the operating system in a binary format. This allowed them to distribute a minimum amount of source code to binary license holders. They separated each of the drivers and system kernel modules into two sections: a code portion and a data portion. The code portion does not require recompilation depending on the selected options at SYSGEN time; this is supplied in object format (xx.o). The data portion requires selection parameters based on sysgen answers; this is supplied in source code format (xx_data.c). Making changes to this table will alter the default partition size characteristics for new disks. An example of the changes to the uda driver is included here. Example: /usr/sys/data/uda_data.c: }, ra81_sizes[8] ={ 15884, 0, /* A=blk 0 thru 15883 */ 66880, 15884, /* B=blk 15884 thru 82763 */ -1, 0, /* C=blk 0 thru end */ 0, 0, /* D= not used */ 0, 0, /* E= not used */ 0, 0, /* F= not used */ -1, 82764, /* G=blk 82764 thru end */ 0, 0, /* H= not used */ }; The -1 above indicates the end of the disk. 3.5.7.7 Newfs --------------- The newfs program speeds up the creating of a file system on a partition. It looks up information, in the file /etc/disktab, on the disk specified by the system manager and creates the file system according to those default values. An example of the changes to the /etc/disktab file have been included here. Example: /etc/disktab: qd21|QD21|Emulex QD21 Fujitsu Eagle M2351A Winchester:\ :ty=winchester:ns#47:nt#20:nc#840:\ :pa#15884:ba#4096:fa#512:\ :pb#66880:bb#4096:fb#512:\ :pc#789600:bc#4096:fc#1024:\ :pg#706836:bg#4096:fg#1024: 3.5.7.8 Suggestions/Warnings ------------------------------ There is a maximum of eight partitions per disk. The partitions form logical boundaries on the disk, separating each file system from all others. These logical divisions are useful for disk management because you can put similar types of users, files, directories or projects all on the same file system. Because a file system can never exceed its partition in size, you can use partitions to regulate disk use. There are certain areas of the disk which, by default, are reserved for the operating system. By mounting the swap space, for example, on its own partition important data can not be overwritten when data from memory is swapped to the disk. The Ultrix-32 systems use partition "b" for the swap file. If you plan to use your own partition values, be sure to allocate an area on your system disk for a swap file. For more information on disk partitioning and modifications to the partition sizes, see Appendix C, "Disk Partitioning", in the Ultrix-32 System Manager's Guide. The program "diskpart" is used to create entries for the disk driver or for the "disktab" file. It creates a template based on the default rules used at Berkeley. The following is a table defining the Berkeley defaults: Partition 20-60 MB 61-205MB 206-355 MB 356+ MB a 15884 15884 15884 15884 b 10032 33440 33440 66880 c * all all all all d 15884 15884 15884 15884 e unused 55936 55936 307200 f * unused end end end g * end end end end * The 'c' partition is, by convention, used to access the entire disk. In normal operation, either the 'g' partition is used, or the 'd', 'e', and 'f' partitions are used. The 'f' and 'g' partitions are variable sized, occupying whatever space remains after allocation of the fixed sized partitions. NOTE Ultrix-32 V1.0 did not support self-sizing disks and is, therefore, unusable with the Emulex MSCP controllers. The "diskpart" program was not included on the Ultrix-32 V1.1 distribution kit. ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ Section 4 INSTALLATION ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ 4.1 Overview -------------- The procedure for installing the QD21 Disk Controller is described in this section. The subsection titles are listed below to serve as an outline of the procedure. Subsection³ Title ÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ 4.2 ³ Inspection 4.3 ³ Disk Controller Setup 4.4 ³ Physical Installation 4.5 ³ ESDI Drive Preparation 4.6 ³ Cabling 4.7 ³ NOVRAM Loading, Disk Formatting, and Testing 4.8 ³ F.R.D. Options 4.9 ³ Drive Configuration Parameters 4.10 ³ Operation If you are unfamiliar with the subsystem installation procedure, Emulex recommends reading this Installation Section before beginning. 4.1.1 Subsystem Configurations -------------------------------- This section is limited to switch setting data and physical installation instructions. No attempt is made to describe the many subsystem configurations that are possible. If you are not familiar with the possible configurations, we strongly recommend reading Section 3, PREPARING THE INSTALLATION, before attempting to install this subsystem. When you are installing the subsystem, you should make a record of the subsystem configuration and environment. Figure 4-1 is a Configuration Record Sheet that lists the information required and shows where the data can be found This information will be of help to an Emulex service representative should your subsystem require service. 4.1.2 DIP Switch Type ----------------------- Switch-setting tables in this manual use the numeral one (1) to indicate the ON (closed) position and the numeral zero (0) to indicate the OFF (open) position. The two DIP switch types used in this product are shown in Figure 4-2. Each is set to the code shown in the switch setting example. 4.1.3 Maintaining FCC Class A Compliance ------------------------------------------ Emulex has tested the QD21 Intelligent Disk Controller with DEC computers that comply with FCC Class A limits for radiated and conducted interference. When properly installed, the QD21 does not cause compliant computers to exceed Class A limits. There are two possible configurations in which the QD21 and its associated ESDI peripherals can be installed: o With both the QD21 Disk Controller and the ESDI disk drives both mounted in the same cabinet, and o With the QD21 mounted in the CPU cabinet and the ESDI drives mounted in a separate cabinet. To limit radiated interference, DEC completely encloses the components of its computers that generate or could conduct radio-frequency interference (RFI) with a grounded metal shield (earth ground). During installation of the QD21, nothing must be done that would reduce this shield's effectiveness. That is, when the QD21 installation is complete, no gap in the shield that would allow RFI to escape can be allowed. Conducted interference is generally prevented by installing a filter in the ac line between the computer and the ac outlet. Most power distribution panels that are of current manufacture contain suitable filters. The steps that must be taken to maintain the integrity of the shield and to limit conducted interference are explained fully in subsection 4.6. 4.2 Inspection ---------------- Emulex products are shipped in special containers designed to provide full protection under normal transit conditions. Immediately upon receipt, the shipping container should be inspected for evidence of possible damage incurred in transit. Any obvious damage to the container, or indications of actual or probable equipment damage, should be reported to the carrier company in accordance with instructions on the form included in the container. Unpack the QD21 subsystem and, using the shipping invoice, verify that all equipment is present. Verify also that model or part numbers (P/N), revision levels, and serial numbers agree with those on the shipping invoice. Subsection 1.4 explains model numbers and details kit contents. These verifications are important to confirm warranty. If evidence of physical damage or identity mismatch is found, notify an Emulex representative immediately. If the equipment must be returned to Emulex, it should be shipped in the original container. Visually inspect the QD21 Disk Controller after unpacking. Check for such items as bent or broken connector pins, damaged components, or any other evidence of physical damage. Examine all socketed components carefully to ensure that they are properly seated. 4.3 Disk Controller Setup --------------------------- Several configuration setups must be made on the QD21 Disk Controller before inserting it into the chassis. These setups are made by option switches SW1 and SW2. Figure 4-3 shows the locations of the configuration switches referenced in the following paragraphs. LED1 :LED2 ::LED3 ÚÄÂÄÄÄÄÄÄÄÂÄÄÄÄÄÄÂÄÂÂÂÂÄÄÄÄÂÄ¿ ³ ÀÄÄÄÄÄÄÄÁÄÄÄÄÄÄÙ ÀÄÄÄÄÙ ³ ³ J1 J2 SW1 ³ ³ÚÄÄÄÄÄÄÄÄÄ¿ ÚÄÄÄÄ¿³ ³ÀÄÄÄÄÄÄÄÄÄÙ ÀÄÄÄÄÙ³ ³ J3 J5 ³ ³ÚÄÄÄÄÄÄ¿EFG Ú¿U29 ³ NOVRAM (U29) BUFFER ³³ ³HJK ÚÄ¿ ÀÙ ³ CONTROLLER ³³ U30 ³ ³S³ PQR ³ ³ÃÄÄÄÄÄÄ´ ³W³ ³ HOST ADAPTER ³³ U38 ³ ³2³ S ³ CONTROLLER ³³ ³ ÀÄÙ TÚÄ¿ ³ (HAC) ³ÀÄÄÄÄÄÄÙ ³U³ ³ FIRMWARE PROM (U44) ³ ÚÄ¿ ³4³ ³ ³ ³U³ U³4³ ³ ³ ³4³ VÀÄÙ ³ ³ ³9³ ³ 22-BIT IC (U49) À¿ ÀÄÙ Ú¿ ÚÙ ÀÄÄÄÄÄÄÄÄÄÄÄÄÙÀÄÄÄÄÄÄÄÄÄÄÄÄÙ Figure 4-3. QD21 Disk Controller Assembly ============================================ NOTE If you change a switch position on the QD21, or change the configuration values in the NOVRAM, you must also reset the QD21 so that the host operating system's initialization sequence reads the codes established by the switch settings and/or NOVRAM. To reset the QD21, either toggle switch SW1-1 (ON then OFF), or power-down and power-up the the system. If you toggle SW1-1, be sure the system is offline. Resetting the coupler with the system running is likely to crash the system. Table 4-1 defines the function and factory configuration of all switches on the QD21 controller. The factory configuration switch settings are representative of most QD21 Disk Controller applications. Table 4-1. QD21 Switch Definitions and Factory Configuration ÚÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄ¿ ³ SW ³ OFF(0) ³ ON(1) ³ FACT ³ Function ³ Section ³ ÃÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄ´ ³ SW1-1 ³ Run ³ Reset/Halt ³ OFF(0) ³ Runvs.Reset/Halt ³ ³ ³ SW1-2 ³ - ³ - ³ OFF(0) ³ MSCP Device Number (LSB) ³ 4.3.3.2 ³ ³ SW1-3 ³ - ³ - ³ OFF(0) ³ MSCP Device Number ³ 4.3.3.2 ³ ³ SW1-4 ³ - ³ - ³ OFF(0) ³ MSCP Device Number (MSB) ³ 4.3.3.2 ³ ³ ³ ³ ³ ³ ³ ³ ³ SW2-1 ³ Disable ³ Enable ³ OFF(0) ³ Loop on Self-Test Error ³ ³ ³ SW2-2 ³ Disable ³ Enable ³ OFF(0) ³ Automatic Bootstrap ³ 4.3.3.1 ³ ³ SW2-3 ³ - ³ - ³ OFF(0) ³ LSI-11 Bus Address ³ 4.3.1 ³ ³ SW2-4 ³ - ³ - ³ OFF(0) ³ LSI-11 Bus Address ³ 4.3.1 ³ ³ SW2-5 ³ - ³ - ³ OFF(0) ³ LSI-11 Bus Address ³ 4.3.1 ³ ³ SW2-6 ³ 18-bit ³ 22-bit ³ OFF(0) ³ 22-Bit Addressing ³ 4.3.3.3 ³ ³ SW2-7 ³ 4 usec ³ 8 usec ³ OFF(0) ³ DMA Burst Delay ³ 4.3.3.4 ³ ³ SW2-8 ³ Enable ³ Disable ³ OFF(0) ³ Adaptive DMA Mode ³ 4.3.3.5 ³ ÃÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄ´ ³ ON(1) = Closed ³ ³ OFF(0) = Open ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ Table 4-2 lists the function and factory configuration of all jumpers on the controller. Table 4-2. QD21 Jumper Definitions and Factory Configuration ÚÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³Jumper ³ OUT ³ IN ³FACT ³ Comment ³ ÃÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´ ³A-B-C-D³ Reserved ³ Reserved ³ ³ ³ ³ E-F-G ³ Not Used ³ Not Used ³ OUT ³ Must be OUT ³ ³ H-J-K ³ Not Used ³ Not Used ³ OUT ³ Must be OUT ³ ³ L-M-N ³ Reserved ³ Reserved ³ ³ ³ ³ P-Q ³ Disable Clock ³ Enable Clock ³ IN ³ Must be IN ³ ³ R ³ Normal Operation ³ Ground (Test)³ OUT ³ Must be OUT ³ ³ S-T ³ 16K PROM ³ 32K PROM ³ IN ³ Rev E and above ³ ³ ³ ³ ³ OUT ³ Rev D and below ³ ³ U-V ³ Normal Operation ³ Factory Test ³ OUT ³ Must be OUT ³ ÃÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´ ³ FACT = Factory Setting ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ 4.3.1 Disk Controller Bus Address ----------------------------------- Every LSI-11 bus I/O device has a block of several registers through which the system can command and monitor that device. The registers are addressed sequentially from a starting address assigned to that controller, in this case an MSCP-class Disk Controller. The address for the first of the QD21's two LSI-11 bus registers is selected by DIP switches SW2-3 through SW2-5. See Table 4-3 for register address switch settings. For more information on determining the LSI-11 bus address, see Section 3 and Appendix A. Table 4-3. Controller Address Switch Settings ÚÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄ¿ ³ ³--- SW2 ---³ ³ ³Bus Address³ 3 4 5 ³Factory³ ³(in octal) ³ ³ ³ ÃÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄ´ ³ 772150 ³ 0 0 0 ³ * ³ ³ 772154 ³ 1 0 0 ³ ³ ³ 760334 ³ 0 1 0 ³ ³ ³ 760340 ³ 1 1 0 ³ ³ ³ 760344 ³ 0 0 1 ³ ³ ³ 760350 ³ 1 0 1 ³ ³ ³ 760354 ³ 0 1 1 ³ ³ ³ 760360 ³ 1 1 1 ³ ³ ÀÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÙ 4.3.2 Interrupt Vector Address -------------------------------- The interrupt vector address for the QD21 is programmed into the device by the operating system during the MSCP initialization sequence. See subsection 3.5 for a discussion of vector addresses. 4.3.3 Options --------------- There are other QD21 options that can be implemented by the user. These features are selected by physically installing the option on the PCBA or by enabling the option using a switch. 4.3.3.1 Automatic Bootstrapping --------------------------------- The automatic bootstrapping option causes the system to boot automatically from logical unit 0 through 3 on power-up when the QD21 is at the standard base address. To enable this option, set SW2-2 ON and set switches SW1-2 through SW1-4 as described in Table 4-4. This option should not be enabled with a MicroVAX or in a system that uses an 11/73B CPU module. Switch ³ OFF ³ ON ³Factory ÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄ SW2-2 ³Disable ³ Enable ³ OFF The automatic bootstrapping process requires that the LSI-11 CPU module be configured for power-up mode 0. The following table lists the configuration settings for several popular LSI-11 CPUs. CPU ³ Configuration Setting ÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ 11/73A³ Install W3 and W7 11/23+³ Remove J18-J19 and J18-J17 11/23 ³ Remove W5 and W6 11/02 ³ Remove W5 and W6 If the bootstrap device is not powered-up or safe (e.g., it failed its self- test), the autoboot routine in the QD21 halts the CPU after 1 minute. This causes the CPU to enter Console ODT. You can then examine the Status and Address (SA) register (base address plus 2) for an MSCP error code (Table 5-3) and bootstrap the system from another device. You can bootstrap from a drive supported by a QD21 installed at an alternate LSI-11 bus address, using any boot process other than autoboot. In this case, be certain that the automatic bootstrap option is disabled (SW2-2 OFF). 4.3.3.2 MSCP Device Number ---------------------------- QD21 switches SW1-2 through SW1-4 specify MSCP device numbers. The functions of these switches are dependent on the options you select for your QD21: o If the QD21 is installed at the standard LSI-11 bus address, these switches identify the MSCP device number of the drive from which to bootstrap. The QD21 automatic bootstrap option supports only MSCP units 0 through 3 at the standard address. o If the QD21 is installed at an alternate LSI-11 bus address, these switches identify the MSCP device number of the first drive supported by that alternate QD21. The first drive supported by the QD21 at an alternate address may be drive 0 through 7. 4.3.3.2.1 Logical Unit to Boot From ------------------------------------- If the QD21 automatic bootstrapping option is enabled (SW2-2 ON) and the QD21 is at the standard LSI-11 bus address (772150), switches SW1-2 through SW1-4 define the MSCP device number of the drive from which the QD21 bootstraps. By using these switches, you may select one of four logical units to bootstrap from. Table 4-4 defines the MSCP device numbers selected by switches SW1-2 through SW1-4 if the QD21 is at a standard address. Table 4-4. Bootstrap MSCP Device Number ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄ¿ ³ Bootstrap MSCP ³ ------- SW1 ------- ³ Factory ³ ³ Device Number ³ 2 3 4 ³ ³ ³ ³ (LSB) (MSB) ³ ³ ÃÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄ´ ³ 0 ³ 0 0 0 ³ * ³ ³ 1 ³ 1 0 0 ³ ³ ³ 2 ³ 0 1 0 ³ ³ ³ 3 ³ 1 1 0 ³ ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÙ 4.3.3.2.2 First Logical Unit Number for an Alternate Address -------------------------------------------------------------- If your QD21 is installed at an alternate address, switches SW1-2 through SW1-4 select the MSCP device number of the first drive supported by the QD21. MSCP device numbering schemes may vary by DEC operating system (see subsection 3.4.2.2). Table 4-5 defines the MSCP device numbers selected by switches SW1-2 through SW1-4 if the QD21 is at an alternate address. Example 4-1: Your system operates under RSX-11M-PLUS and has two QD21 Disk Controllers. The first QD21 is at the standard base address for MSCP controllers (772150) and supports three logical drives: Unit 0, Unit 1, and Unit 2. The second QD21 is at an alternate base address and supports two logical drives. RSX-11M-PLUS requires that the first drive on the alternate QD21 have an MSCP device number of 3 and that the second drive have an MSCP device number of 4. On the alternate QD21, set switches SW1-2 in the ON position, SW1-3 in the ON position, and SW1-4 in the OFF position to specify a MSCP device number of 3 for the first drive. This example would also apply if the first MSCP controller were a DEC MSCP controller with three logical drives. Table 4-5. MSCP Device Number for the First Drive Supported by a QD21 at an Alternate Address ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ Starting MSCP ³ ------- SW1 ------- ³ ³ Device Number ³ 2 3 4 ³ ³ ³ (LSB) (MSB) ³ ÃÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´ ³ 0* ³ 1 0 0 ³ ³ 1 ³ 0 1 0 ³ ³ 2 ³ 1 1 0 ³ ³ 3 ³ 0 0 1 ³ ³ 4 ³ 1 0 1 ³ ³ 5 ³ 0 1 1 ³ ³ 6 ³ 1 1 1 ³ ³ 7 ³ 0 0 0 ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ *Used to bootstrap a drive from the QD21 at an alternate LSI-11 bus address. 4.3.3.3 22-Bit Memory Addressing ---------------------------------- The 22-bit addressing capability is a standard option for the QD21 and is supplied with the QD21 as a kit, part number QD0111302. To enable 22-bit addressing, install the single 7438 IC in socket U49 on the QD21 PCBA and set SW2-6 ON (1). 22-bit addressing must be enabled with MicroVAX systems. CAUTION Some manufacturers of LSI-11 bus backplanes use the backplane lines now devoted to extended addressing for power distribution. Installing a QD21 with the extended addressing option in such a system will damage the option IC. Before installing the option, confirm that there is neither positive nor negative potential between lines BC1, BD1, BE1, BF1, and logic ground. A QD21 without the extended addressing option will not be damaged if power is present on those lines. 4.3.3.4 DMA Burst Delay ------------------------- The QD21 firmware design includes a switch-selectable DMA burst delay to avoid data-late conditions. Switch SW2-7 selects either a 4- or 8-microsecond delay between DMA bursts. Even with the QD21 adaptive DMA, some applications may require a longer burst delay to allow other devices adequate time on the bus. Switch³ OFF ³ ON ³Factory ÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄ SW2-7 ³ 4 usec ³ 8 usec ³ OFF 4.3.3.5 DMA Adaptive Mode --------------------------- Depending on the other devices on the bus and their priority, the QD21 may use more or less bus time than optimal for your application. The QD21 allows you to modify its DMA operations by disabling adaptive DMA. If adaptive DMA is disabled, the host processor programs the DMA burst length to a maximum of 8 words per burst. When adaptive DMA is enabled (SW2-8 OFF), the QD21 monitors the LSI-11 bus for other pending DMA requests and suspends its own DMA activity to permit other DMA transfers to occur. If the QD21 is not getting the bus time your application requires, you may want to disable the adaptive DMA. When adaptive DMA is disabled, the QD21 performs a burst transfer of 8 words of less, relinquishes the bus, then performs another DMA burst transfer. Switch³ OFF ³ ON ³Factory ÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄ SW2-8 ³ Enable ³ Disable ³ OFF ³ Adaptive DMA ³ Adaptive DMA ³ NOTE If you are using the QD21 with adaptive DMA enabled in a MicroVAX II subsystem, be aware that the CPU module uses DMA requests to gain use of the bus to service device interrupts and may interfere with the QD21's bus access. You may consider disabling adaptive DMA for improved throughput. 4.4 Physical Installation --------------------------- This section provides instruction for system preparation, slot selection, and mounting the QD21. 4.4.1 System Preparation -------------------------- To prepare your CPU to accept the QD21, use the following procedures: o MICRO/PDP-11 and MicroVAX I and II Preparation: 1. Power down the system by switching OFF the main ac breaker. 2. Remove the rear cover from the chassis so that the patch panel is exposed. The rear cover is held on by snap pads. Grasp the cover at the top and bottom, and pull straight back. 3. Loosen the captive screws from the patch panel using a standard screwdriver. 4. Remove the patch panel. 5. Find the flat-ribbon cable that connects the CPU module to the patch panel. For easier board installation, you may disconnect the CPU flat-ribbon cable from the patch panel. o LSI-11 Series Preparation: 1. Power down the system by switching OFF the main ac breaker. 2. Remove the cover from the chassis so that the backplane is exposed. Do not replace the covers or patch panels until the installation is verified (subsection 4.8). 4.4.2 Slot Selection ---------------------- The QD21 may be assigned to any desired slot because it uses the LSI four- level interrupt scheme to perform distributed interrupt arbitration. Be sure to find out whether your backplane is straight or serpentine and choose a slot accordingly. On straight backplanes, the QD21 must be plugged into connectors A and B, since connectors C and D carry no signals. On a serpentine backplane, the QD21 can be plugged into either connectors A and B or connectors C and D. There must be no unused slots, however, between the CPU and the QD21. If you have a DEC RQDX1 in your backplane, be sure to install the QD21 in front of the RQDX1; not all RQDX1 controllers pass grant signals. 4.4.3 Mounting ---------------- The QD21 Disk Controller PWB should be plugged into the LSI-11 backplane with components oriented in the same direction as the CPU and other modules. Always insert and remove the boards with the computer power OFF to avoid possible damage to the circuitry. Be sure that the board is properly positioned in the throat of the board guides before attempting to seat the board by means of the extractor handle. 4.5 ESDI Disk Drive Preparation ----------------------------------- The disk drive(s) must have an ID plug or address selection switches properly configured and the drive set for either hard or soft sectoring. If you are using hard sectored drives, remember that in the autoconfigure mode the drive sector setting is overridden by the set bytes per sector command from the controller. If you are using the NOVRAM values, the drive sectoring must be set to match the NOVRAM values. 4.5.1 Drive Placement ----------------------- Unpack and install the disk drives according to the manufacturer's instructions Install the disk drives in their final positions before beginning the installation of the QD21. This positioning allows the I/O cable routing and length to be accurately judged. 4.5.2 Sectoring ----------------- The QD21 supports both hard and soft sectored drives. The drive parameter tables in Appendix C recommend either soft or hard sectoring; set jumpers or switches as indicated in the drive manufacturer's manual. In general, if a drive is capable of both hard and soft sector format, hard-sectoring is preferred as long as the number of hard sectors does not reduce the possible drive capacity. 4.5.3 Drive Numbering ----------------------- A unique address must be selected for each drive. The logical unit number is determined by the address given to the drive. See subsection 3.2.2. Drive manufacturers use jumpers, switches, or ID plugs to select addresses. Consult the appropriate drive manual for the exact procedure. 4.5.4 Spindle Motor Spin-up ----------------------------- Most ESDI drives have a spindle motor control option which allows the the drive controller to control the timing of the drive spindle motor spin-up. Emulex recommends that you allow the QD21 controller to start the spin-up of the drive(s). If there is more than one drive, the QD21 issues the spin-up commands to each drive sequentially. This will minimize any power surge on multiple drive systems. 4.5.5 Termination ------------------- Terminator power is supplied by the drive. The terminated drive must therefore have power applied in order for termination to be effective. Otherwise, indeterminate results will occur. Only the last drive in the string is terminated. 4.6 Cabling ------------- The QD21 Disk Controller interfaces with each ESDI disk drive that it controls via one 34-line control cable and a 20-line data cable. The control cable originates from connector J3 on the QD21 and is daisy-chained to all of the supported drives, terminating on the last drive. Maximum cumulative cable length for the control cable is 10 feet (3 meters). The data cables originate from connectors J1 and J2 on the QD21; each data cable is connected directly from the QD21 to each supported disk drive. Maximum cable length for each data cable is 10 feet (3 meters). Emulex offers the QD21 Internal Cabling Kit (P/N QD2113001) which allows you to install the QD21 and the ESDI disk drive(s) in the CPU cabinet. Table 4-6 lists the components of this cabling kit; Figure 4-4 shows basic cable installation. In addition, Emulex offers the QD21 External Cabling Kit (P/N QD0113003) which allows you to install the QD21 in the CPU cabinet and the ESDI disk drives in a separate cabinet; instructions for installing this kit are described in the QD01/QD21 Cabling Kit Instruction Sheet (P/N QD0152401). Table 4-6. QD21 Internal Cabling Kit (P/N QD2113001) ÚÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³Qty³ Part Number³Cable Length³ Cable Description ³ ÃÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´ ³ 2 ³QU0111202-01³ 3 ft ³20-conductor, flat ³ ³ ³ ³ ³ESDI data interface ³ ³ ³ ³ ³ ³ ³ 1 ³QU0111201-01³ 1 ft ³34-conductor, flat ³ ³ ³ ³ ³ESDI control interface³ ³ ³ ³ ³daisy-chain ³ ³ ³ ³ ³ ³ ³ 1 ³QU0111203-01³ 1 ft ³34-conductor, flat ³ ³ ³ ³ ³ESDI control interface³ ÀÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ Table 4-7 lists the components that are required to construct both control and data cables. Table 4-7. Interface and Cable Components ÚÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ ³ ³ Cable Components ³ ³Cnctr ³ Controller ³ Header Control Cable Type Drive ³ ³Number ³ Function ³ Type Cnctr Unshield Shielded Cnctr ³ ÃÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´ ³J3 ³ Control ³ 3594 3414 3801/34 3517/34 3463 ³ ³J1/J2 ³ Data ³ 3592 3421 3801/20 3517/20 3461 ³ ÃÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´ ³Cnctr = Connector ³ ³All component numbers are 3M. Equivalents may be used. ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ UNIT 0 CONTROL CABLE ÚÄÄÄÄÄÄÄÄÄÄÄ¿ ÉÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍËÍÍÍÍÍÍÍÍÍÍÍͳ¿ ESDI ³ QD21 º DATA CABLE º ³Ù DISK ³ ÚÄÄÄÄÄÄÄÄÄÄÄÄÄ×Ä¿J1 ÚÄÄÄÄÄÄÄÄÄÄÄÄÄĺÄÄÄÄÄÄÄÄÄÄÄij] DRIVE ³ ³ J3Úº[ÅÄÄÄÄÄÄÄÄÄÄÙ º ÀÄÄÄÄÄÄÄÄÄÄÄÙ ÆÍ À¼[ÅÄÄÄÄÄÄÄÄÄÄ¿ º(DAISY CHAINED)..TERMINATOR ³ ³J2 ³ º ÚÄÄ:ÄÄÄÄÄÄÄÄ¿ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ ³ ÈÍÍÍÍÍÍÍÍÍÍÍͳ¿ º ESDI ³ ³DATA CABLE ³Ù DISK ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄij] DRIVE ³ ÀÄÄÄÄÄÄÄÄÄÄÄÙ UNIT 1 Figure 4-4. Drive Cabling ========================== The Federal Communications Commission (FCC) has mandated that equipment that uses radio-frequency signals in its operation must limit the amount of electromagnetic interference (EMI) that it radiates. Most manufacturers, including DEC, limit EMI by building continuous metal shields into their equipment cabinets. When installing the QD21 and its disk drives, you must take care that the shield that DEC has built into its equipment cabinets is not defeated. The routing of the cables that connect the QD21 and its disk drives can have a major impact on the amount of EMI that is radiated by the subsystem (the combination of the QD21 and its drives), especially if the QD21 and the disk drives are installed in separate cabinets. As noted in subsection 4.1.3, the QD21 and its ESDI disk drive(s) can be installed in either of two configurations: o With both the QD21 Disk Controller and the ESDI disk drive(s) that it supports mounted in the same cabinet o With the QD21 mounted in the CPU cabinet and the ESDI disk drive(s) mounted in a separate cabinet When the QD21 and the ESDI disk drive are installed in the same cabinet, it is possible that the cabinet itself provides sufficient shielding. In such cases, it is not usually necessary to shield the cable that carries the ESDI interface between the QD21 and the ESDI peripherals. NOTE If the cabinet in which the QD21 and LSI-11 CPU are installed was manufactured before 1 October 1983, it may not provide sufficient shielding or filtering to prevent excessive RFI radiation or conduction. In case of complaint, it is the operator's responsibility to take whatever steps are necessary to correct the interference. If the ESDI disk drives are mounted in a separate cabinet from the QD21 Disk Controller, then the cables that connect the QD21 to the drives should probably be shielded, because they run outside the shielded cabinet environment. In addition, you should take special care that the integrity of the shield is maintained where the cables pass through it. Usually, designers use clamps that effectively connect the cable shielding to the cabinet shield. Section 4 (continued) ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ 4.7 NOVRAM Loading, Disk Formatting, and Testing -------------------------------------------------- After physically installing the QD21, several steps are required to prepare the subsystem for operation. They are: o Loading the drive configuration into the NOVRAM o Formatting and verifying the media o Testing the subsystem The QD21 disk controller firmware incorporates a self-contained set of disk preparation and diagnostic utilities, called firmware-resident diagnostics (F.R.D.). F.R.D. provides several important disk preparation functions, including the ability to configure the controller NOVRAM, format the drive, test the disk surface and replace defective blocks, and perform reliability testing of the attached disk subsystem. These utilities allow you to communicate directly with either CRT or hardcopy devices connected to an LSI-11 or MicroVAX console port. The basic application of F.R.D. is in preparing MSCP disk drives for use in your subsystem. Before data can be stored on a drive, the disk must be formatted and any bad blocks identified. F.R.D. provides options that allow you to perform these functions. You use NOVRAM configuration options to set and review your drive parameter values. The steps involved in disk preparation are formatting the drive and then verifying that each logical block is good. Because the QD21 automatically replaces any block listed in the manufacturer's defect list, it is unlikely that the verify operation will find any additional bad blocks. However, F.R.D. supports both automatic and manual block replacement operations to allow for replacing blocks not contained in the MDL or for use in the event that the MDL has been destroyed. Automatic replacement, or blanket bad block replacement, is a feature of several F.R.D. options. With this feature, you can format a drive, verify, and replace any bad blocks in one step. During this format/verify operation, bad blocks are displayed in logical block number (LBN) format. If replacement is enabled, the blocks are replaced automatically. Manual bad block replacement is a separate option. This option allows you to identify specific bad blocks to be replaced. In addition, you can identify the blocks in Bytes From Index (BFI) format or in LBN format. Using BFI format eliminates the calculation required for LBN. This is most often useful in replacing blocks identified as bad in the manufacturer's defect list when that list no longer exists on the drive. BFI replacement must be done before any LBN replacement. Once LBN replacement occurs, the BFI values are no longer valid. There are several ways you can use F.R.D. options to format and verify your disk. The method you choose depends on whether you: o Have formatted this disk o Want to replace blocks using BFI or LBN information o Want to preserve data on this disk Each method is described below. The options listed are on the F.R.D. main menu. Use them in the order they are listed. (F.R.D. options are described in section 4.8.) If this is the initial format of a disk with a valid MDL and you want to replace those defects that are outside of the MDL, use: o Option 2, Format and Verify with replacement enabled If this is the initial format of a disk that contains no usable defect list, and you want to replace manufacturer's detected defects from the hardcopy list, use: o Option 1, Format o Option 7, Replace Block using BFI format o Option 3, Verify with replacement enabled If this disk is formatted and you want to preserve data and obtain a list of bad blocks, use: o Option 4 with replacement disabled 4.7.1 F.R.D. Conventions -------------------------- F.R.D. uses the following keyboard conventions: required to terminate operator inputs aborts the current operation and returns to the main menu A minimum delay of 10 seconds may occur between the and the next display. During some verify operations, the delay may be considerably longer because the abort is delayed until the successful completion of the current command. In this case, a screen message informs you of the delay. In this section, operator responses to F.R.D. prompts appear in bold print. The symbols used in this section are listed below with their meanings: carriage return key line feed key Ctrl key and the letter C pressed at the same time 4.7.2 Starting F.R.D. on a MicroVAX I --------------------------------------- F.R.D. is started by issuing a special command sequence via console ODT. To start F.R.D. on a MicroVAX I, first apply power to the system. Put the system in console mode, then enter the following commands via the host console in response to the >>> prompt: >>>D/P/W 2000XXXX 1 !INIT CONTROLLER >>>E/P/W 2000YYYY 900 OR B00 !STEP ONE FROM QD21 >>>D/P/W 2000YYYY 3003 !ENABLE SPECIAL MODE >>>E/P/W 2000YYYY 0100 !ACK SPECIAL MODE >>>D/P/W 2000YYYY 4401 !UPLOAD DRIVER >>>E/P/W 2000YYYY 0400 !UPLOAD DONE >>>S 80 !START DRIVER NOTE: XXXX and YYYY are offsets dependent on the address of the QD21 controller. See Table 4-8 for the available values. 4.7.3 Starting F.R.D. on a MicroVAX II ---------------------------------------- F.R.D. is started by issuing a special command sequence via console ODT. To start F.R.D. on a MicroVAX II, first apply power to the system. Put the system in console mode, then enter the following commands via the host console in response to the >>> prompt: >>>I !BUS INIT >>>D/P/W 20001F40 20 !ENABLE MEMORY >>>D/P/L 20088000 80000000 !SETUP MAP 0 >>>D/P/L 20088004 80000001 !SETUP MAP 1 >>>D/P/W 2000XXXX 1 !INIT CONTROLLER >>>E/P/W 2000YYYY 900 OR B00 !STEP ONE FROM QD21 >>>D/P/W 2000YYYY 3003 !ENABLE SPECIAL MODE >>>E/P/W 2000YYYY 0100 !ACK SPECIAL MODE >>>D/P/W 2000YYYY 4401 !UPLOAD DRIVER >>>E/P/W 2000YYYY 0400 !UPLOAD DONE For MicroVAX II: >>>S 80 !START DRIVER For GPX Workstation: >>>S 82 !START DRIVER NOTE: XXXX and YYYY are offsets dependent on the address of the QD21 controller. See Table 4-8 for the available values. Table 4-8. MicroVAX Offsets ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄ¿ ³ CONTROLLER ³ XXXX ³ YYYY ³ ³ BUS ADDRESS ³ ³ ³ ÃÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄ´ ³ 772150 ³ 1468 ³ 146A ³ ³ 772154 ³ 146C ³ 146E ³ ³ 760334 ³ 00DC ³ 00DE ³ ³ 760340 ³ 00E0 ³ 00E2 ³ ³ 760344 ³ 00E4 ³ 00E6 ³ ³ 760350 ³ 00E8 ³ 00EA ³ ³ 760354 ³ 00EC ³ 00EE ³ ³ 760360 ³ 00F0 ³ 00F2 ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÙ 4.7.4 Starting F.R.D. on an LSI-11 System ------------------------------------------- To start F.R.D. on an LSI-11 system, first halt the processor. Then enter the following commands in response to the ODT prompt (@): @ 177xxxxx/ 000000 1 @ 177yyyyy/ 4400 or 5400 30003 @/000400 42000 @ 177yyyyy/ 2000 !TEST FOR 2000 @ 200G NOTE: XXXX and YYYY are offsets dependent on the address of the QD21 controller. See Table 4-9 for the available values. Table 4-9. LSI-11 Offsets ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄ¿ ³ CONTROLLER ³ XXXX ³ YYYY ³ ³ BUS ADDRESS ³ ³ ³ ÃÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄ´ ³ 772150 ³ 72150 ³ 72152 ³ ³ 772154 ³ 72154 ³ 72156 ³ ³ 760334 ³ 60334 ³ 60336 ³ ³ 760340 ³ 60340 ³ 60342 ³ ³ 760344 ³ 60344 ³ 60366 ³ ³ 760350 ³ 60350 ³ 60352 ³ ³ 760354 ³ 60354 ³ 60356 ³ ³ 760360 ³ 60360 ³ 60362 ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÙ When the appropriate start procedure is completed, F.R.D. identifies itself by displaying the controller type and firmware revision. Then, it displays the menu options. See subsection 4.8 for more information on F.R.D. options. 4.7.5 Terminating F.R.D. -------------------------- To terminate F.R.D., choose one of the following: o Press the BREAK key o Reinitialize the system, or o Halt the CPU. You can restart the diagnostics from a halted condition if you have not changed the memory contents. On an LSI-11 system, enter 200G at the ODT prompt. On a MicroVAX system, enter S 80. 4.8 F.R.D. Options -------------------- F.R.D. is an interactive, menu-driven utility. This section describes the function of each option on the F.R.D. main menu. The menu appears as follows: Program Option Menu 1 - Self-test loop 2 - Format 3 - Verify 4 - Format and verify 5 - Data reliability test 6 - Format, verify, and data reliability test 7 - Read only test 8 - List known units 9 - Replace block 10 - Display Novram 11 - Edit / Load Novram Enter option number: The main menu and each submenu prompt for required input. When you enter a valid selection, the next menu displays or F.R.D. performs the selected option. If you make an invalid entry, F.R.D. rejects it, displays an error message, and reprompts. Based on the nature of the MSCP emulation being performed, some operations may produce an observable delay when performed on previously unformatted drives. This delay is approximately 30 seconds. When an option is finished, F.R.D. displays the prompt "Hit any key to continue" and waits for you to do so before returning to the main menu. 4.8.1 Option 1 - Self-test Loop --------------------------------- The Self-test Loop option detects intermittent hardware failures that have already passed through the first self-test. The LED indicators on the QD24 front panel will blink when a pass has compeleted. If an error occurs, the self-test loop option stops and reports an error; the LEDs on the front panel display the error code. A description of the error codes is displayed on the host console device. This option may be aborted by 4.8.2 Option 2 - Format ------------------------- The Format option is used to initially format a drive. The operation writes sector headers; initializes the drive's replacement caching tables (RCT), and replaces any defects listed in the MDL. It is used to format a virgin drive, a drive that has been determined to contain unusable data, or a drive with a format that is improper to use with a particular controller. If a type 2 drive is being formatted (configuration parameters are read from the drive), F.R.D. prompts for spiral offset. After formatting, the drive contains a valid RCT with a serial number you specified. During format, F.R.D. attempts to read and use the MDL. F.R.D. displays a message if the MDL cannot be read. If portions of the MDL are bad, F.R.D. uses whatever good information can be extracted. It is possible that either type 1 or type 2 drives might have so many multiple sector/track defects that the default number of spare cylinders allocated for replacement usage is not large enough. If the number of defects in the MDL exceeds the replacement area allocated, you will be alerted by a message stating that the present value doesn't allow formatting with MDL and how many spare cylinders are required to accomodate the MDL. This number of spare cylinders includes two additional cylinders for future bad spots. If this occurs, you have two choices: Drive Type Code 2. Continue to format without MDL, running two passes of verify and 10 passes of reliability to remove pattern sensitive bad blocks. Drive Type Code 1. Change to type code 1 and change the number of spare cylinders as required by the message from F.R.D; restart the format. You will be notified if a drive has been formatted without the MDL; this will occur if a drive's MDL cannot be read and/or if there is an insufficient number of spare cylinders. You have the option to let the formatting continue or to abort using , F.R.D. reports the number of bad blocks detected by the Verify operation. There will be no message if the Verify option does not detect any errors. 4.8.4 Option 4 - Format and Verify ------------------------------------ This option formats a drive, then tests the surface to replace pattern- sensitive and defective sectors. It performs both of the operations that are available separately with options 2 (Format) and 3 (Verify). This option also offers a bad block replacement feature which, when enabled, replaces any bad blocks found during the verify operation. 4.8.5 Option 5 - Data Reliability Test ---------------------------------------- This option allows you to thoroughly test your subsystem. The reliability test uses Write, Write/Check, and Read functions to test the controller-to-drive portion of the subsystem. In addition, an independent DMA operation between the host memory and the controller tests the host/controller interface. The test defaults to two reserved diagnostic cylinders so that user data will be protected; a test of the full pack is your option. To run the reliability test indefinitely, select 0 (zero) passes. If the test encounters errors, F.R.D. displays text error messages. These messages are primarily for use by Emulex technical support personnel. 4.8.6 Option 6 - Format, Verify, and Data Reliability Test ------------------------------------------------------------ This option combines options 2 (Format), 3 (Verify), and 5 (Data Reliability Test). This option automates the initialization and testing of drives, since you can select multiple drives and activate the data reliability test without having to wait for the format and verify options to complete. The format and verify portions of this option run in the order of the drives selected. Drives with hard faults are dropped and the sequence moves to the next drive in the list. The reliability portion of this option runs simultaneously on all selected drives. 4.8.7 Option 7 - Read Only Test --------------------------------- This option causes all the user-available blocks on the selected drive to be Read-only, not Write/Read, during the Verify pass. When a block is encountered that cannot be accessed because of header or data field errors, the utility displays the Logical Block Number. The Read Only Test option also offers a bad block replacement feature, which, when enabled, replaces any bad blocks. Because F.R.D. runs with ECC disabled and does not cache any read data, no corrected data is available to put in the replacement block. This means that even though the defective block is replaced and no forced error flag is set in the replacement sector, the data is nonvalid CAUTION This may cause problems if the replaced blocks contain executable program files. For this reason, you should back up sensitive data before running this option with the replacement feature enabled. This option is usually used after the drive is formatted. However, if you plan to manually replace the bad blocks identified in the manufacturer's defect list, be certain to do so before using Option 7 with replace enabled. 4.8.8 Option 8 - List Known Units ----------------------------------- This option causes the program to list all the drives that are configured in the NOVRAM. Only those units that can be selected by the controller are listed as available. A user size (in 512-byte blocks) and a media type I.D. are listed with all drives found by this option. The user size does not include RCT area, diagnostic cylinders, designated or hidden spare tracks or blocks, etc. In addition, this option displays the attached drive's physical geometry. This display includes all areas of the disk. If the device size in logical blocks is calculated from this data, the number will be larger than the displayed user size. The difference is the number of LBNs used for RCT, diagnostic cylinders, spares, etc. 4.8.9 Option 9 - Replace Block -------------------------------- This option allows you to replace a specific bad block or group of blocks without using the blanket replacement feature found in the Verify and Read Only options. You choose to identify either logical blocks (entered in decimal MSCP Logical Block Number format) or Bytes From Index (as listed in the manufactur- er's defect list), then enter the block to be replaced. If you specify LBN, then you will be prompted to enter the block to be replaced. If you specify BFI, you will be prompted for the number of bytes from index, then to enter the length in bits. BFI replacement eliminates the calculation required to translate BFI to LBN format. F.R.D. requires the cylinder, track, and bytes from index of the defect for each BFI entry. When you initiate replacement, F.R.D. prompts for the number of bytes from index. As soon as you enter this value, you are prompted to enter the length in bits, then F.R.D. begins replacing blocks. LBN replacement allows you to replace blocks identified as bad during the format operation, when they are identified in LBN format by older versions of DEC operating systems which do not support host-initiated replacement. If you are using both types of replacement, BFI replacement must be complete before LBN replacement is begun. Further, BFI replacement must be complete before the blanket bad block replacement feature of other options is enabled. Emulex recommends that you run the Verify option after the replacement option is complete. The Verify option runs test patterns that may detect any pattern- sensitive blocks. 4.8.10 Option 10 - Display NOVRAM ----------------------------------- This option displays the current contents of the NOVRAM for your drives. The information displayed depends on the type code entered in the NOVRAM. For type 1 drives, this option displays the current NOVRAM parameter values. For type 2 drives, this option lists the drive as type 2 with parameters read from the drive. 4.8.11 Option 11 - Edit/Load NOVRAM ------------------------------------- This option allows you to enter the drive configuration parameters into the controller. If a drive type code of 1 is specified, F.R.D. prompts you for the required drive parameters. If a drive type code of 2 is specified, the controller obtains configuration parameters from the drive. 4.9 Drive Configuration Parameters ------------------------------------ When you edit or load NOVRAM configuration parameters, you are asked to enter the values required for your configuration. This section describes each parameter and states the range of valid entries for each. The required values for each drive supported by Emulex are listed in Appendix C. You begin loading NOVRAM parameter values by selecting Option 11 from the F.R.D. main menu. F.R.D. then displays each parameter, one at a time. The parameter displays with a range of valid entries and a default value. Enter the appropriate value (in decimal) or simply press the return key to accept the default value (the last value entered). The next parameter then displays. 4.9.1 Type Code ----------------- This parameter indicates the type of disk drive. Valid values are 1 and 2. If you enter 1, the controller expects to find drive configuration information contained in the NOVRAM. F.R.D. then displays each parameter for you to enter the values. If you enter 2, the controller obtains the drive configuration information from the drive. In this case, the only other parameter value you enter for this drive is the spiral offset, which is entered when you initiate a format option during formatting. The spiral offset parameter is saved on the disk drive. Default values are used for the number of spare sectors per track (1) and the number of alternate cylinders (2). NOTE A compatibility issue may exist if you define a drive as Type 1, then later redefine it as Type 2, even if the NOVRAM values you entered match those read from the drive. If a drive is in hard sector mode, the controller is configured for Type 2 drives, and you want to switch the drive to Type 1, then the drive must first be powered down. This allows it to switch from Type 2 commanded Bytes per Sector to the number of bytes per sector determined by the drive sector switches or jumpers. This problem may be eliminated by setting the drive jumpers or switches to match the number of sectors determined by the Type 2 calculations. 4.9.2 Number of Units of this Type ------------------------------------ This parameter specifies the quantity of attached physical disk drives that use the NOVRAM parameters that follow. Valid values are 1 and 2. If you enter 1, the utility uses a separate set of parameter values for each drive. In this case, it prompts for parameter values for the second drive. If you enter 2, the same parameter values are used for both drives. 4.9.3 Number of Sectors per Track ----------------------------------- This parameter specifies the total number of physical sectors per track, including spares. The valid range is from 1 through 255. 4.9.4 Number of Heads ----------------------- This parameter specifies the number of data heads per physical drive. The valid range is from 1 through 63. 4.9.5 Number of Cylinders --------------------------- This parameter specifies the total number of physical cylinders per drive, including spares. The valid range is from 1 through 4,095. 4.9.6 Number of Spare Sectors per Track ----------------------------------------- This parameter specifies the number of spare sectors reserved per track. Emulex recommends a value of 1; larger values will unnecessarily reduce the capacity of the drive. The default value of 1 is used if you select a type code of 2. 4.9.7 Number of Alternate Cylinders ------------------------------------- This parameter specifies the number of spare cylinders per physical drive. The valid range is from 0 through 15. At least one cylinder must be specified as an alternate. (If spare sectors are specified, the sector replacement algorithm needs one track for working space.) Emulex recommends a value of two; this is the default value if you select a type code of 2. If Split Code 1 is used, you must specify twice the normal number of alternate cylinders because they are divided evenly between the two logical drives. A minimum of 2 alternate cylinders must be specified if block replacement is to function with a cylinder split. 4.9.8 Configuration Bits -------------------------- This parameter defines some additional configuration parameters of the drive. This parameter has a 4-bit field with a valid range from 0 through 15. If you selected type code 2 for this drive, the configuration information is read from the drive and you will not need this information. If you selected type code 1 for this drive and your subsystem includes a drive that Emulex supports, refer to Appendix C for the value to enter for this parameter. If your drive is not supported by Emulex, refer to the drive manufacturer's manual for drive requirements, then enter the appropriate values as defined below: Bit 0: This bit is 0 if the drive is hard sectored and 1 if the drive is soft sectored. Bit 1: This bit specifies whether or not the drive can perform early or late data strobe operations. The valid range for this bit is 0 or 1. If this bit is 0, the drive cannot perform early or late data strobe operations. If this bit is 1, the drive is capable of performing early or late data strobe operations. Bit 2: This bit specifies whether or not the drive is capable of head offset operations. The valid range for this bit is 0 or 1. If this bit is 0, the drive cannot perform head offset operations. If this bit is 1, the drive is capable of performing head offset operations. Bit 3: This bit specifies whether or not the drive negates the Command Complete signal during a head select operation. The valid range for this bit is 0 or 1. If this bit is 0, the Command Complete signal remains on during a head select. If this bit is 1, the Command Complete signal is negated during a head select. The decimal value for this parameter is calculated from these binary bits. Table 4-10 shows the decimal value for each drive configuration. If your drive is not listed in Appendix C, find your drive configuration in the table. Then follow that row over to the decimal value. Table 4-10. Configuration Bit Values in Decimal ÚÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄ¿ ³ Command ³ Head ³ Data ³ Sector³ Decimal³ ³ Complete³ Offset³ Strobe³ Value ³ ³ ÃÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄ´ ³ OFF ³ NO ³ NO ³ HARD ³ 0 ³ ³ OFF ³ NO ³ NO ³ SOFT ³ 1 ³ ³ OFF ³ NO ³ YES ³ HARD ³ 2 ³ ³ OFF ³ NO ³ YES ³ SOFT ³ 3 ³ ³ OFF ³ YES ³ NO ³ HARD ³ 4 ³ ³ OFF ³ YES ³ NO ³ SOFT ³ 5 ³ ³ OFF ³ YES ³ YES ³ HARD ³ 6 ³ ³ OFF ³ YES ³ YES ³ SOFT ³ 7 ³ ³ ON ³ NO ³ NO ³ HARD ³ 8 ³ ³ ON ³ NO ³ NO ³ SOFT ³ 9 ³ ³ ON ³ NO ³ YES ³ HARD ³ 10 ³ ³ ON ³ NO ³ YES ³ SOFT ³ 11 ³ ³ ON ³ YES ³ NO ³ HARD ³ 12 ³ ³ ON ³ YES ³ NO ³ SOFT ³ 13 ³ ³ ON ³ YES ³ YES ³ HARD ³ 14 ³ ³ ON ³ YES ³ YES ³ SOFT ³ 15 ³ ÀÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÙ 4.9.9 Split Code ------------------ This parameter allows the drive(s) defined by this parameter block to be split into two logical disk units (two each, if more than one drive is defined by this block). The split codes are: Code 0: No split. Code 1: The cylinders are divided between the two logical drives. A starting cylinder offset value specifies the first cylinder of the second logical drive. Code 2: The drive's data heads are divided between the two logical drives. A starting head offset value specifies the first head of the second logical drive. If you select a head split code on a drive with both fixed and removable media, the removable media may be configured as logical unit number (LUN) 0 and the fixed media as LUN 1. Code 3: Identical to Code 2 except the logical assignments for the physical drives are reversed. Reverse head split codes also divide the drive by data heads, but assign the lower numbered heads to drive 1 and the higher numbered heads to drive 0. Use of the split option disables seek-ordering and overlapped seek processing in the MSCP Controller, which reduces performance, particularly when both logicals of a split physical drive are active. If drive type 2 is selected, no splits are available. 4.9.10 Cylinder Offset ------------------------ This parameter specifies the physical cylinder that is to be used as the first cylinder of the second logical drive. This field has meaning only if a Split Code 1 is specified. If a Split Code 0, 2, or 3 is selected, this parameter must be 0. 4.9.11 Starting Head Offset ----------------------------- This parameter specifies the physical drive head that is to be used as the first head of the second logical drive. This field has meaning only if a Split Code 2 or 3 is specified. The valid range is from 1 through 63. If a Split Code 0 or 1 is selected, this value must be 0. 4.9.12 Removable Media ------------------------ This parameter indicates whether the disk media is fixed or removable. If you are defining one logical/phsical drive, this parameter uses a 1-bit field with valid values of 0 and 1, where 0 indicates fixed media and 1 indicates removable media. If you are defining a drive with a logical split, this parameter uses a 2-bit field with a valid range from 0 through 3: Definition ³ Decimal Value ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ LUN 0 and LUN 1 are both fixed. ³ 0 LUN 0 is removable, LUN 1 is fixed. ³ 1 LUN 0 is fixed, LUN 1 is removable. ³ 2 LUN 0 and LUN 1 are both removable. ³ 3 4.9.13 Gap 0, 1, and 2 Parameters ----------------------------------- These parameters specify the recording format for each sector on the drive. The recording format allows gaps, as, for example, between header and data fields. These gaps are based on a formula intended to allow the drive time for read/write transitions while maximizing data capacity. Enter the appropriate value for the type code 1 drive. The values Emulex recommends for drives are calculated by using type code 2. If you specified type code 2 for this drive, F.R.D. calculates these values based on information provided by the drive. 4.9.14 Spiral Offset ---------------------- This parameter specifies the number of sectors by which sector 0 of a track is offset from sector 0 of the previous track. Offsetting sector 0 from one track to the next is a technique that is used to reduce latency when performing write or read operations that cross a track boundary. When the drive is formatted, sector 0 of a track is offset a certain number of sectors from the position of sector 0 on the previous track. When this is done, spiral write and read operations are more efficient because the drive has time to switch heads before encountering sector 0. The valid range is from 0 through 31. Use a spiral offset of 1 for all drives except Embedded Servo drive. If you use an Embedded Servo drive (check the drive manual), use a spiral offset of 11. If poor disk performance is noted, adjust the spiral offset value until maximum throughput is achieved. Note: The drive must be reformatted each time the spiral offset is changed. 4.10 Operation ---------------- There are no operational instructions. The QD21 is ready for MSCP initialization as soon as its drives are formatted and tested. 4.10.1 Indicators ------------------- There are three light emitting diodes (LEDs) on the QD21 PWB. These LEDs are used for both diagnostics and for normal operations. If switch SW2-1 is OFF, the QD21 executes a preliminary test at the following times: o On power-up o After a reset condition o After a bus initialization o After a write operation to the Initialization and Polling (IP) register (base address) The self-test routine consists of two test sequences: preliminary and self-test The preliminary test sequence exercises the 8031 microprocessor chip and the Disk Formatter chip. When the QD21 successfully completes the preliminary test, LED3 illuminates indicating that the QD21 is waiting for the MSCP initialization sequence. During the MSCP initialization sequence, initiated by host software control, the QD21 executes a self-test that exercises the buffer controller chip, the Host Adapter Controller (HAC) chip and its associated circuitry, the on-board RAM, and the control memory PROM. If the QD21 passes this sequence of its self-test successfully, all the LED indicators on the edge of the QD21 are OFF. If a fatal error is detected either during self-test or while the system is running, all three of the edge-mounted LED indicators are ON (illuminated). If the QD21 fails to pass its power-up self-tests, you can select a special diagnostic mode (switch SW2-1 ON) which causes the LED indicators to display an error code. See Self-Test Error Reporting, in Section 5, TROUBLESHOOTING. During normal operation, LED1 and LED2 flicker occasionally. These LEDs are used to indicate LSI-11 bus activity and ESDI disk drive activity respectively. ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ Section 5 TROUBLESHOOTING ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ 5.1 Overview -------------- This section describes the several diagnostic features with which the QD21 Disk Controller is equipped, and outlines fault isolation procedures that use these diagnostic features. Subsection ³ Title ÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ 5.2 ³ Service 5.3 ³ Fault Isolation Procedure 5.4 ³ Power-Up Self-Diagnostics 5.5 ³ Fatal Error Codes 5.2 Service ------------- Your Emulex QD21 Disk Controller was designed to give years of trouble-free service, and it was thoroughly tested before leaving the factory. Should one of the fault isolation procedures indicate that the QD21 is not working properly, the product must be returned to the factory or to one of Emulex's authorized repair centers for service. Emulex products are not designed to be repaired in the field. Before returning the product to Emulex, whether the product is under warranty or not, you must contact the factory or the factory's representative for instructions and a Return Materials Authorization (RMA) number. Do not return a component to EMULEX without authorization. A component returned for service without an authorization will be returned to the owner at the owner's expense. In the continental United States, Alaska, and Hawaii contact: Emulex Technical Support 3545 Harbor Boulevard Costa Mesa, CA 92626 (714)662-5600 TWX 910-595-2521 Outside California: (800) 852-7112 After 5 p.m. Pacific Time, call (800) 638-7243. When answered, you will be prompted to key in 37115, followed by a # symbol, then a message. Outside the United States, contact the distributor from whom the subsystem was initially purchased. To help you efficiently, Emulex or its representative requires certain information about the product and the environment in which it is installed. During installation, a record of the switch setting should have been made on the Configuration Reference Sheet. This sheet is contained in the Installation Section, Figure 4-1. After you have contacted Emulex and received an RMA, package the component (preferably using the original packing material) and send the component postage paid to the address given you by the Emulex representative. The sender must also insure the package. 5.3 Fault Isolation Procedure ------------------------------- This fault isolation procedure is provided in flow chart format. The procedure is based on the self-diagnostics incorporated into the QD21. The procedure is designed to be used if the product's self-diagnostic fails or if many errors are flagged by the subsystem during normal operation. If neither of these events happens, it is not necessary to follow these procedures. The Fault Isolation Chart is shown in Figure 5-1. The chart symbols are defined in Table 5-1. Table 5-1. Flow Chart Symbol Definitions ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ ÉÍÍÍÍÍÍÍÍÍÍ» º º START POINT, ENDING POINT ÈÍÍÍÍÍÍÍÍÍͼ /\ / \ / \ / \ DECISION, GO AHEAD ACCORDING WITH YES OR NO \ / \ / \ / \/ ÚÄÄÄÄÄ¿ ³ ³ CONNECTOR, GO TO SAME-NUMBERED SYMBOL ÀÄ¿ ÚÄÙ ÀÄÙ ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ ³ PROCESS ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ ÉÍÍÍÍÍÍÍÍÍÍ» º START º ÈÍÍÍÍÑÍÍÍÍͼ ³ ÚÄÄÄÄÄ¿ ÚÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄ¿ ³ 1 ³ ³ POWER UP QD21 ³ ÀÄ¿ ÚÄÙ ³DO NOT BOOT SYSTEM³ ÀÂÙ ÀÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÙ ³ ÃÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ ÚÄÄÄÄÁÄÄÄ¿ ³READ SA ³ ³REGISTER³ ÀÄÄÄÄÂÄÄÄÙ ³ /\ / SA \ ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ /REGISTER\ ³FATAL HARDWARE ERROR, RESEAT CONTROLLER³ /IS 4400 OR \ NO ³OR MOVE IT TO ANOTHER BACKPLANE SLOT. ³ \ 5400 /ÄÄÄÄÄÄÄÄÄÄ´CHECK CONTROLLER SWITCHES FOR CORRECT ³ \ / ³CSR SELECTION. ENSURE YOU ARE ACCESSING³ \ / ³I/O PAGE ON 22-BIT SYSTEMS. ³ \/ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ ³YES ³ ÚÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄ¿ ³ UPLOAD F.R.D. ³ ³ TO MEMORY ³ ³SEE SECTION 4.7.3³ ÀÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÙ ³ /\ / \ /EXAMINE \ / THE SA \ NO ÉÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ» \REGISTER, IS/ÄÄÄÄÄÄÄÄÄĶSUCCESSFUL F.R.D. LOADº \ BIT 15 / ÈÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍͼ \SET?/ \/ ³YES ³ /\ ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ / \ ³FATAL F.R.D. DMA TO MEMORY³ ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ / \ ³ON MICROVAX II, CHHECK TO ³ ³CALL EMULEX ³ / SA BITS \ YES ³ENSURE YOU HAVE ENABLED ³ ³CUSTOMER SERVICE³ \ 07:00=121? /ÄÄÄÄÄÄÄÄÄ´MEMORY MAP, SEE SECTION ÃÄÄ´IF RETRY IS ³ \ / ³4.7.3 ³ ³UNSUCCESSFUL ³ \ / ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ \/ ³NO ³ /\ / SA \ / BITS \ ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ / 07:00=? \ NO ³CALL EMULEX ³ \SEE SECTION /ÄÄÄÄÄÄÄÄÄ´CUSTOMER SERVICE³ \ 5.5 / ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ \ / \/ ³YES ³ ÚÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄ¿ ³DETERMINE FAULT AND³ ³ATTEMPT TO CORRECT ³ ÀÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÙ ³ ÚÄÄÁÄÄ¿ ³ 1 ³ ÀÄ¿ ÚÄÙ ÀÄÙ Figure 5-1. Fault Isolation Chart ================================== 5.4 Power-Up Self-Diagnostic ------------------------------ QD21 executes an extensive self-diagnostic to ensure that the disk controller is in good working order. The self-diagnostic is divided into several parts. Table 5-2 lists the tests in the order in which they are performed. The first two tests are executed immediately after power-up, a reset, a bus INIT, or a write to the IP register (base address). The other tests are executed as the controller interacts with the MSCP initialization routine. If the QD21 fails any of the tests, it posts an MSCP fatal error code in the low-byte of the SA register (base address plus 2) and turns on three LEDs which are located on the outside edge of the PWB. The MSCP fatal error codes used by the QD21 are listed in Table 5-3. Note that some fatal errors may not allow access to the SA register from the console. To help determine the location of the problem, the operator can select a special diagnostic mode that causes the LEDs to display an error code. To enable this diagnostic mode, place the CPU halt switch in the ON position and set QD21 switch SW2-1 ON (1). After setting SW2-1 ON, the host computer must be powered down or QD21 switch SW1-1 must be toggled (turned ON and then OFF) to cause the QD21 to again perform its self-test. Upon encountering an error, the host microprocessor halts and the LEDs display an error code. The error codes are listed and described in Table 5-2. If the QD21 completes the diagnostic mode without errors, all three LEDs are OFF. Set switch SW2-1 in the OFF position and reset the QD21 controller before using. Table 5-2. LED Error Codes ÚÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ LED ³ ³ ³ 3 2 1 ³ Error Description ³ ÃÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´ ³ 0 0 0 ³ Self-Diagnostic complete without errors ³ ³ 0 0 1 ³ CPU Chip Test failed ³ ³ 0 1 0 ³ Formatter Chip Test failed ³ ³ 1 0 0 ³ Controller idle, waiting for initialization ³ ³ 0 1 1 ³ Buffer Controller or External Memory Test failed ³ ³ 1 0 1 ³ HAC Test failed ³ ³ 1 1 0 ³ Emulation PROM Checksum Test failed ³ ÀÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ 5.5 Fatal Error Codes ----------------------- If the QD21 detects a fatal error anytime during operation, all three LEDs are illuminated and an error code is posted in the low byte of the SA register (base address plus 2). Table 5-3 lists the MSCP fatal error codes used by the QD21. Table 5-3. MSCP Fatal Error Codes Used by the QD21 ÚÄÄÄÄÄÂÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³Octal³ Hex ³ Description ³ ³Code ³ Code³ ³ ÃÄÄÄÄÄÅÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´ ³ 0 ³ 0 ³ No information in message packet. ³ ³ ³ ³ ³ ³ 1 ³ 1 ³ Possible parity or timeout error when the ³ ³ ³ ³ QD21 attempted to read data from a message ³ ³ ³ ³ packet. ³ ³ ³ ³ ³ ³ 2 ³ 2 ³ Possible parity or timeout error when the ³ ³ ³ ³ QD21 attempted to write data to a message ³ ³ ³ ³ packet. ³ ³ ³ ³ ³ ³ 4 ³ 4 ³ QD21 diagnostic self-test indicated a ³ ³ ³ ³ controller RAM error. ³ ³ ³ ³ ³ ³ 5 ³ 5 ³ QD21 diagnostic self-test indicated a ³ ³ ³ ³ firmware checksum error. ³ ³ ³ ³ ³ ³ 6 ³ 6 ³ Possible parity or timeout error when the ³ ³ ³ ³ QD21 attempted to read an envelope address ³ ³ ³ ³ from a command ring. ³ ³ ³ ³ ³ ³ 7 ³ 7 ³ Possible parity or timeout error when the ³ ³ ³ ³ QD21 attempted to write an envelope ³ ³ ³ ³ address to a command ring. ³ ³ ³ ³ ³ ³ 11 ³ 9 ³ Host did not communicate with QD21 within ³ ³ ³ ³ the time frame established while bringing ³ ³ ³ ³ the controller online. ³ ³ ³ ³ ³ ³ 12 ³ A ³ Operating system sent more commands to the ³ ³ ³ ³ QD21 than the controller can accept. ³ ³ ³ ³ ³ ³ 13 ³ B ³ Controller unable to perform DMA transfer ³ ³ ³ ³ operation correctly. ³ ³ ³ ³ ³ ³ 14 ³ C ³ QD21 diagnostic self-test indicated ³ ³ ³ ³ controller fatal error. ³ ³ ³ ³ ³ ³ 16 ³ E ³ The MSCP connection identifier is invalid. ³ ³ ³ ³ ³ ³ 23 ³ 13 ³ An error occurred during the MSCP ³ ³ ³ ³ initialization sequence. ³ ÀÄÄÄÄÄÁÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ Additional fatal error messages may appear. These error codes are listed in Table 5-4. Table 5-4. Fatal Error Codes ÚÄÄÄÄÄÂÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³Octal³Hex ³ Description ³ ³Code ³Code ³ ³ ÃÄÄÄÄÄÅÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´ ³ 004 ³ 04 ³ RAM error ³ ³ ³ ³ ³ ³ 005 ³ 05 ³ Firmware checksum error ³ ³ ³ ³ ³ ³ 014 ³ 0C ³ Fatal error during self-test ³ ³ ³ ³ ³ ³ 111 ³ 49 ³ Autoboot timeout ³ ³ ³ ³ ³ ³ 121 ³ 51 ³ F.R.D. load to memory failed ³ ÀÄÄÄÄÄÁÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ Section 6 DEVICE REGISTERS AND PROGRAMMING ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ 6.1 Overview -------------- This section contains an overview of the QD21 device registers that are accessible to the LSI-11 bus and that are used to monitor and control the QD21 Disk Controller. The registers are functionally compatible with DEC implementations of MSCP controllers. The following table outlines the contents of this section. Subsection³ Title ÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ 6.2 ³ Overview of MSCP Subsystem 6.3 ³ Programming 6.4 ³ Registers 6.5 ³ Bootstrap Command 6.2 Overview of MSCP Subsystem -------------------------------- Mass Storage Control Protocol (MSCP) is the protocol used by a family of mass storage controllers and devices designed and built by Digital Equipment Corporation. MSCP allows a host system to be connected to subsystems with a variety of capacities and geometries. This flexibility is possible because MSCP defines data locations in terms of sequential, logical blocks, not in terms of a physical description of the data's location (i.e., cylinder, track, and sector). This scheme gives the MSCP subsystem the responsibility for converting MSCP logical block numbers into physical addresses that the peripheral device can understand. This technique has several implications. First, the MSCP subsystem must have detailed knowledge of the peripheral's capacity, geometry, and status. Second, the ability to make the translation between logical and physical addresses implies considerable intelligence on the part of the subsystem. Finally, the host is relieved of responsibility for error detection and correction because its knowledge of the media is insufficient to allow error control to be done efficiently. There are several advantages to this type of architecture. First, it provides the host with an "error-free" media. Second, it provides for exceptional operating system software portability because, with the exception of capacity, the characteristics of all MSCP subsystems are the same from the operating system's point of view. In terms of implementation, this protocol requires a high degree of intelligence on the part of the subsystem. Essentially, this intelligence is a process that runs on a microprocessor and is referred to as an MSCP controller. The MSCP controller has all of the responsibilities outlined above. The host computer runs corresponding software processes which take calls from the operating system, convert them into MSCP commands, and cause the resulting command to be transferred to the MSCP controller. In summary, an MSCP subsystem is characterized by an intelligent controller that provides the host with the view of a perfect media. It is further characterized by host independence from a specific bus, controller, or device type. For more information about MSCP subsystems, see subsections 3.2, 3.3, and 3.4. 6.3 Programming ----------------- A complete description of MSCP commands and the corresponding status responses which the QD21 Disk Controller posts is beyond the scope of this manual. 6.3.1 MSCP Command Support ---------------------------- No currently available MSCP Controller supports the entire range of MSCP commands. The following subsections describe the extent of MSCP command support by the QD21. 6.3.1.1 Minimal Disk Subset ----------------------------- The QD21 Disk Controller supports the entire minimal disk subset of MSCP commands. 6.3.1.2 Diagnostic and Utility Protocol (DUP) ----------------------------------------------- The QD21 Disk Controller does not support any of the DUP commands or maintenance read/write commands. Therefore, the QD21 is not compatible with DEC diagnostics that use the MSCP DUP commands. 6.4 Registers --------------- During normal operation, the QD21 Disk Controller is controlled and monitored using the command and status packets that are exchanged by the Class Driver (host) and the MSCP Controller. The QD21 has two 16-bit registers in the LSI-11 Bus I/O page that are used primarily to initialize the subsystem. During normal operation, the registers are used only to initiate polling or to reset the subsystem. These registers are always read as words. The register pair begins on a longword boundary. Table 6-1 lists the octal and hexadecimal values for the Initialization and Polling (IP) register (base address) and the Status and Address (SA) register (base address plus 2) supported by the QD21. The IP register (base address) has two functions as detailed below: o When written with any value, it causes a hard initialization of the MSCP Controller. o When read while the port is operating, it causes the controller to initiate polling. The SA register (base address plus 2) has four functions as listed below: o When read by the host during initialization, it communicates data and error information relating to the initialization process. o When written by the host during initialization, it communicates certain host-specific parameters to the port. o When read by the host during normal operation, it communicates status information including port and controller-detected fatal errors. o When zeroed by the host during either initialization or normal operation, it signals the port that the host has successfully completed a bus adapter purge in response to a port-initiated purge request. Table 6-1. QD21 IP and SA Registers ÚÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄ¿ ³Register³ Octal ³Hexadecimal³ ÃÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄ´ ³ IP ³ 772150 ³ 20001468 ³ ³ SA ³ 772152 ³ 2000146A ³ ³ ³ ³ ³ ³ IP ³ 772154 ³ 2000146C ³ ³ SA ³ 772156 ³ 2000146E ³ ³ ³ ³ ³ ³ IP ³ 760334 ³ 200000DC ³ ³ SA ³ 760336 ³ 200000DE ³ ³ ³ ³ ³ ³ IP ³ 760340 ³ 200000E0 ³ ³ SA ³ 760342 ³ 200000E2 ³ ³ ³ ³ ³ ³ IP ³ 760344 ³ 200000E4 ³ ³ SA ³ 760346 ³ 200000E6 ³ ³ ³ ³ ³ ³ IP ³ 760350 ³ 200000E8 ³ ³ SA ³ 760352 ³ 200000EA ³ ³ ³ ³ ³ ³ IP ³ 760354 ³ 200000EC ³ ³ SA ³ 760356 ³ 200000EE ³ ³ ³ ³ ³ ³ IP ³ 760360 ³ 200000F0 ³ ³ SA ³ 760362 ³ 200000F2 ³ ÀÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÙ 6.5 Bootstrap Command ----------------------- To allow the system to be easily bootstrapped from peripherals attached to the QD21 Disk Controller, Emulex has incorporated a Bootstrap Command into the controller. This feature is not part of the standard MSCP command set nor is it supported on the MicroVAX or on systems using an 11/73B CPU module. The Bootstrap Command can be issued from the console after the system is powered up, or it may be incorporated into a firmware routine that is located in a Bootstrap ROM. (The ROM would not be located on the QD21 PWB, but on some other module in the system.) The Bootstrap Command causes the QD21 to load the first logical block from the selected peripheral into host memory starting at location 00000. To issue the Bootstrap Command to the QD21: 1. Initialize the QD21 by writing any value into the IP register (base address). The QD21 performs self-test and begins the initialization dialog. Register ³ Octal ÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄ IP: Write ³ 000001 2. The QD21 indicates that initialization step 1 has begun by setting bit 11 in the SA register (base address plus 2). The host must poll the register for this value (no interrupt is generated). Bit 8 should also be set. If 22-bit addressing is enabled, bit 9 will be set. Register ³ Octal ³Addressing ÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄ SA: Read ³ 0044000 ³ 18-Bit ³ 005400 ³ 22-Bit 3. When the controller indicates that step 1 of the initialization dialog is begun, load the SA register (base address plus 2) with the "special initialization code:" Register ³ Octal ÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄ SA: Write ³ 030003 4. The controller acknowledges the initialization code with 00400. Register ³ Octal ÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄ SA: Read ³ 000400 5. Load the SA register (base address plus 2) with 04000n(8) or 400n(16), where n is the MSCP logical unit number of the unit to bootstrap from. In this example, the unit is 0. Register ³ Octal ÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄ SA: Write ³ 040000 6. At the console emulator prompt, enter P to begin: @P ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ Section 7 FUNCTIONAL DESCRIPTION ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ 7.1 Overview -------------- This section contains a description of the QD21 Disk Controller's architecture. 7.2 QD21 Disk Controller Architecture ----------------------------------------- The QD21 is a microprocessor-based emulating disk controller that is contained on a single dual-wide PCBA. The QD21's major functional blocks are shown in Figure 7-1. The disk controller is organized around the eight-bit 8031 microprocessor. The board has an eight-bit internal data bus with 16-bit addressing capability. The Host Adapter Controller, the Formatter Controller, and the Buffer Controller are addressed as memory (memory-mapped I/O). The 8031's primary task is to decode and implement commands from the host. At command completion, the microprocessor is also responsible for generating status and transmitting it to the host. A large part of the microprocessor's job while performing those duties involves setting up the Host Adapter Controller and the Buffer Controller for the large data transfers that are their specialties. The QD21 uses a 27256 erasable programmable read-only memory (EPROM), which contains the control program, and 16K bytes of random access memory (RAM), which is used for data buffering and working storage. The LSI-11 bus interface contains 22 lines. Sixteen of the lines are multiplexed for both address and data; six are used for only address. The Host Adapter Controller is used for programmed I/O, CPU interrupts, and DMA data transfers. The microprocessor responds to all programmed I/O and carries out the I/O functions required for the addressed disk controller register. The Host Adapter Controller has automatic LSI-11 bus address generation capability that, in conjunction with a byte counter, allows the interface to conduct LSI-11 bus DMA transfers without direct microprocessor intervention after the interface is set up for a transfer. This automatic DMA capability is used with the QD21 Buffer Controller to transfer large blocks of data directly between host memory and the QD21's RAM. The Buffer Controller is implemented on a single chip. This multi-channel DMA is responsible for moving large blocks of data between the 16K RAM buffer and the ESDI interface, and between the LSI-11 bus interface and the 16K RAM buffer. After being set up for an operation by the microprocessor, either interface requests DMA service from the Buffer Controller by driving an individual request signal active. The transfer then proceeds without direct intervention by the microprocessor. This allows high-speed data transfers to occur while the microprocessor is focused on other processes. ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ Section 8 INTERFACES ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ 8.1 Overview -------------- This section describes the interfaces that the QD21 Disk Controller incorporates. It includes information on the QD21 implementation of ESDI interface electrical and mechanical requirements. Excluding this overview, the section is divided into the following subsections. Subsection³ Title ÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ 8.2 ³ QD21 LSI-11 Bus Interface 8.3 ³ QD21 ESDI Drive Interface 8.2 LSI-11 Bus Interface -------------------------- The LSI-11 bus between the CPU and the QD21 Disk Controller contains 42 bidirectional signal lines and two unidirectional signal lines on connectors A and B, and two unidirectional signal lines on connector C. LSI-11 bus interface pin assignments are listed and described in Table 8-1. These signal lines provide the means by which the CPU and the QD21 Disk Controller communicate with each other. The LSI-11 bus interface is used for programmed I/O, CPU interrupts, and DMA data transfer operations. Addresses, data, and control information are sent along these signal lines, some of which contain time-multiplexed information. The LSI-11 bus interface lines are grouped in the following categories: o Twenty-two Data/Address Lines The four Data/Address lines which carry the most significant bits (MSB) are lines BDAL21:BDAL18. They are used for addressing only and do not carry data. Lines BDAL17 and BDAL16 reflect the parity status of the 16-bit data word during a Write or Read Data Transfer operation via the LSI-11 bus cycle. o Six Data Transfer Control Lines BBS7, BDIN, BDOUT, BRPLY, BSYNC, and BWTBT o Six Direct Memory Access (DMA) Control Lines BDMR, BSACK, BDMGI, and BDMGO (the last two are on both connectors A and C). o Seven Interrupt Control Lines BEVNT, BIAKI, BIAKO, BIRQ4, BIRQ5, BIRQ6, and BIRQ7. o Five System Control Lines BDCOK, BHALT, BINIT, BPOK, and BREF. Table 8-1. LSI-11 Bus Interface Pin Assignments ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ Connector A Signal ³ Connector B Signal ³ ÃÄÄÄÄÄÄÄÄÄÄÂÄÄÄÂÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÂÄÄÄÂÄÄÄÄÄÄÄÄÄÄ´ ³Component ³ ³ Solder ³Component ³ ³ Solder ³ ³ Side ³Pin³ Side ³ Side ³Pin³ Side ³ ÃÄÄÄÄÄÄÄÄÄÄÅÄÄÄÅÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÅÄÄÄÅÄÄÄÄÄÄÄÄÄÄ´ ³ BIRQ5 ³ A ³ +5V ³ BDCOK ³ A ³ +5V ³ ³ BIRQ6 ³ B ³ BPOK ³ ³ B ³ ³ ³ BDAL16 ³ C ³ 0V (GND) ³ BDAL18 ³ C ³ 0V (GND) ³ ³ BDAL17 ³ D ³ BDAL19 ³ ³ D ³ ³ ³ ³ E ³ BDOUT ³ BDAL20 ³ E ³ BDAL02 ³ ³ ³ F ³ BRPLY ³ BDAL21 ³ F ³ BDAL03 ³ ³ ³ H ³ BDIN ³ ³ H ³ BDAL04 ³ ³ 0V (GND) ³ J ³ BSYNC ³ 0V (GND) ³ J ³ BDAL05 ³ ³ ³ K ³ BWTBT ³ ³ K ³ BDAL06 ³ ³ ³ L ³ BIRQ4 ³ ³ L ³ BDAL07 ³ ³ 0V (GND) ³ M ³ BIAKI ³ 0V (GND) ³ M ³ BDAL08 ³ ³ BDMR ³ N ³ BIAKO ³ BSACK ³ N ³ BDAL09 ³ ³ BHALT ³ P ³ BBS7 ³ BIRQ7 ³ P ³ BDAL10 ³ ³ BREF ³ R ³ BDMGI ³ BEVNT ³ R ³ BDAL11 ³ ³ ³ S ³ BDMGO ³ ³ S ³ BDAL12 ³ ³ 0V (GND) ³ T ³ BINIT ³ 0V (GND) ³ T ³ BDAL13 ³ ³ ³ U ³ BDAL00 ³ ³ U ³ BDAL14 ³ ³ ³ V ³ BDAL01 ³ ³ V ³ BDAL15 ³ ÃÄÄÄÄÄÄÄÄÄÄÁÄÄÄÁÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÁÄÄÄÁÄÄÄÄÄÄÄÄÄÄ´ ³ Connector C Signal ³ Connector D Signal ³ ÃÄÄÄÄÄÄÄÄÄÄÂÄÄÄÂÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÂÄÄÄÂÄÄÄÄÄÄÄÄÄÄ´ ³ Component³ ³ Solder ³Component ³ ³ Solder ³ ³ Side ³Pin³ Side ³ Side ³Pin³ Side ³ ÃÄÄÄÄÄÄÄÄÄÄÅÄÄÄÅÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÅÄÄÄÅÄÄÄÄÄÄÄÄÄÄ´ ³ ³ A ³ +5V ³ ³ A ³ +5V ³ ³ ³ B ³ ³ ³ B ³ ³ ³ ³ C ³ 0V (GND) ³ ³ C ³ 0V (GND) ³ ³ ³ D ³ ³ ³ D ³ ³ ³ ³ E ³ ³ ³ E ³ ³ ³ ³ F ³ ³ ³ F ³ ³ ³ ³ H ³ ³ ³ H ³ ³ ³ 0V (GND) ³ J ³ ³ 0V (GND) ³ J ³ ³ ³ ³ K ³ ³ ³ K ³ ³ ³ ³ L ³ ³ ³ L ³ ³ ³ 0V (GND) ³ M ³ BIAKI ³ 0V (GND) ³ M ³ ³ ³ ³ N ³ BIAKO ³ ³ N ³ ³ ³ ³ P ³ ³ ³ P ³ ³ ³ ³ R ³ BDMGI ³ ³ R ³ ³ ³ ³ S ³ BDMGO ³ ³ S ³ ³ ³ 0V (GND) ³ T ³ ³ 0V (GND) ³ T ³ ³ ³ ³ U ³ ³ ³ U ³ ³ ³ ³ V ³ ³ ³ V ³ ³ ÃÄÄÄÄÄÄÄÄÄÄÁÄÄÄÁÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÁÄÄÄÁÄÄÄÄÄÄÄÄÄÄ´ ³All signals, except BDCOK and BPOK, are low active ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ 8.2.1 Interrupt Priority Level -------------------------------- The QD21 is hard-wired to issue level 4 interrupt requests and monitor level 5. The level 4 request is necessary to allow compatibility with either an LSI-11 or LSI-11/2 CPU. 8.2.2 Register Address ------------------------ The QD21 Disk Controller has two registers visible to the LSI-11 bus. Their addresses are determined by DIP switches SW2-3 through SW2-5. See Section 4 for detailed address and switch setting information. 8.2.3 DMA Operations ---------------------- All DMA data transfer operations are performed under microprocessor control. When doing a Read or From Memory operation, a check is made for memory parity or nonexistent memory (NXM) errors; during Write operation a check is made for NXM errors. If an error is detected, an MSCP status error is returned. 8.2.4 Scatter/Gather ---------------------- The QD21 Disk Controller supports the MicroVAX I I/O technique of scatter- write operations and gather-read operations. 8.3 QD21 ESDI Disk Drive Interface ---------------------------------------- This subsection provides information on the QD21 implementation of the Enhanced Small Device Interface (ESDI) interface. The QD21 controller's disk interface conforms to the ESDI Specification and supports the serial mode for magnetic disk drives. The QD21 does not use the drive's defect list. The QD21 Controller interfaces with disk drives via a 34-pin control cable and a 20-pin data cable (for each disk drive). A 34-pin male connector at reference designator J3 on the QD21 Controller plugs directly into the ESDI disk drive control cable. The QD21 Controller contains two 20-pin male connectors, one at reference designator J1 and one at reference designator J2. The QD21 Controller can integrate up to a maximum of two disk drives. Either 20-pin connector (reference designator J1 or J2) can plug directly into the data cable for the first disk drive. If a second disk drive is configured, the unused 20-pin connector is plugged into the data cable for that disk drive. The pin/signal assignments for control signal interface between the QD21 Controller and an ESDI disk drive are shown in Figure 8-1. CONTROLLER CONTROL SIGNALS DRIVE ÉÍÍÍÍÍÍÍÍÍÍÍ» FLAT CABLE OR TWISTED PAIR ÉÍÍÍÍÍÍÍÍÍÍÍÍÍ» º º 3 METERS MAXIMUM º º º ÚÄÄÄÄ×ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ×ÄÄÄÄ1Ä¿ º º ³ ÇÄÄÄÄ - HEAD SELECT 2(3) ÄÄÄĶ2 ³ º º ÃÄÄÄÄ×ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ×ÄÄÄÄ3Ä´ º º ³ ÇÄÄÄÄ - HEAD SELECT 2(2) ÄÄÄĶ4 ³ º º ÃÄÄÄÄ×ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ×ÄÄÄÄ5Ä´ º º ³ ÇÄÄÄÄÄ - WRITE GATE ÄÄÄÄÄÄÄÄĶ6 ³ º º ÃÄÄÄÄ×ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ×ÄÄÄÄ7Ä´ º º ³ ÇÄÄÄ - CONFIG-STATUS DATA ÄÄĶ8 ³ º º ÃÄÄÄÄ×ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ×ÄÄÄÄ9Ä´ º º ³ ÇÄÄÄÄÄ Ä TRANSFER ACK ÄÄÄÄÄÄĶ10 ³ º º ÃÄÄÄÄ×ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ×ÄÄÄÄ11´ º º ³ ÇÄÄÄÄÄÄ - ATTENTION ÄÄÄÄÄÄÄÄĶ12 ³ º º ÃÄÄÄÄ×ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ×ÄÄÄÄ13´ º º ³ ÇÄÄÄÄÄÄ - HEAD SELECT 0 ÄÄÄÄĶ14 ³ º º ÃÄÄÄÄ×ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ×ÄÄÄÄ15´ º º ³ ÇÄ - SECTOR/-ADDRESS MARK ÄÄĶ16 ³ º º ÃÄÄÄÄ×ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ×ÄÄÄÄ17´ º º ³ ÇÄÄÄÄÄ - HEAD SELECT 2 ÄÄÄÄÄĶ18 ³ º º ÃÄÄÄÄ×ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ×ÄÄÄÄ19´ º º ³ ÇÄÄÄÄÄÄÄÄ - INDEX ÄÄÄÄÄÄÄÄÄÄĶ20 ³ º º ÃÄÄÄÄ×ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ×ÄÄÄÄ21´ º º ³ ÇÄÄÄÄÄÄÄ - READY ÄÄÄÄÄÄÄÄÄÄÄĶ22 ³ º º ÃÄÄÄÄ×ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ×ÄÄÄÄ23´ º º ³ ÇÄÄÄÄÄÄÄ - TRANSFER REQ ÄÄÄÄĶ24 ³ º º ÃÄÄÄÄ×ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ×ÄÄÄÄ25´ º º ³ ÇÄÄÄÄÄ Ä DRIVE SELECT 1 ÄÄÄÄĶ26 ³ º º ÃÄÄÄÄ×ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ×ÄÄÄÄ27´ º º ³ ÇÄÄÄÄÄ - DRIVE SELECT 2 ÄÄÄÄĶ28 ³ º º ÃÄÄÄÄ×ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ×ÄÄÄÄ29´ º º ³ ÇÄÄÄÄÄ - DRIVE SELECT 3 ÄÄÄÄĶ30 ³ º º ÃÄÄÄÄ×ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ×ÄÄÄÄ31´ º º ³ ÇÄÄÄÄÄÄÄ - READ GATE ÄÄÄÄÄÄÄĶ32 ³ º º ÃÄÄÄÄ×ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ×ÄÄÄÄ33´ º º ³ ÇÄÄÄÄÄÄ - COMMAND DATA ÄÄÄÄÄĶ34 ³ º º ÄÄÁÄÄ º º ÄÄÁÄÄ º º ÄÄÄ º º ÄÄÄ º ÈÍÍÍÍÍÍÍÍÍÍͼ ÈÍÍÍÍÍÍÍÍÍÍÍÍͼ Figure 8-1. Control Pin/Signal Assignments at ESDI Disk Drive Interface (Connector J1) ====================================================== CONTROLLER DATA SIGNALS DRIVE ÉÍÍÍÍÍÍÍÍÍÍÍ» FLAT CABLE OR TWISTED PAIR ÉÍÍÍÍÍÍÍÍÍÍÍÍÍ» º º 3 METERS MAXIMUM º º º Ç<Ä - DRIVE SELECTED ÄÄÄÄÄÄÄĶ1 º º NCÇ<ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄĶ2 º º Ç<Ä - COMMAND COMPLETE ÄÄÄÄÄĶ3 º º ÇÄÄ - ADDRESS MARK ENABLE ÄÄ>¶4 º º NCÇ< - RESERVED FOR STEP MODE Ķ5 º º ÚÄÄÄÄ×ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ×ÄÄÄÄ6Ä¿ º º ³ ÇÄÄÄÄÄ + WRITE CLOCK ÄÄÄÄÄÄÄ>¶7 ³ º º ³ ÇÄÄÄÄÄ - WRITE CLOCK ÄÄÄÄÄÄÄ>¶8 ³ º º ³ NCÇ< - RESERVED FOR STEP MODE Ķ9 ³ º º ³ Ç<Ä + READ/REFERENCE CLOCK ÄĶ10 ³ º º ³ Ç<Ä - READ/REFERENCE CLOCK ÄĶ11 ³ º º ÃÄÄÄÄ×ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ×ÄÄÄÄ12´ º º ³ ÇÄÄÄÄ + NRZ WRITE DATA ÄÄÄÄÄĶ13 ³ º º ³ ÇÄÄÄÄ - NRZ WRITE DATA ÄÄÄÄÄĶ14 ³ º º ÃÄÄÄÄ×ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ×ÄÄÄÄ15´ º º ÃÄÄÄÄ×ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ×ÄÄÄÄ16´ º º ³ ÇÄÄÄÄÄÄ + NRZ READ DATA ÄÄÄÄĶ17 ³ º º ³ ÇÄÄÄÄÄÄ - NRZ READ DATA ÄÄÄÄĶ18 ³ º º ÃÄÄÄÄ×ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ×ÄÄÄÄ19´ º º ³ ÇÄÄÄÄÄÄÄÄ - INDEX ÄÄÄÄÄÄÄÄÄÄĶ20 ³ º º ³ º º ³ º º ÄÄÁÄÄ º º ÄÄÁÄÄ º º ÄÄÄ º º ÄÄÄ º º Ä º º Ä º ÈÍÍÍÍÍÍÍÍÍÍͼ ÈÍÍÍÍÍÍÍÍÍÍÍÍͼ Figure 8-2. Data Pin/Signal Assignments at ESDI Disk Drive Interface (Connector J2 or J5) ====================================================== 8.4 Front Panel Interface --------------------------- The QD21 provides an interface that allows a remote control and status panel to be connected to the controller. The interface allows write protect switches for each ESDI drive to be connected, and it provides drivers for ready and write-protected status LEDs. The interface is implemented by using a four-wall, right-angle header (3M part number 3591-5002) designated J3. The header has 10 pins. The function of each pin is described in Table 8-2. Figure 8-3 shows the pin-outs and a sample user interface. Table 8-2. Control and Status Interface Pin Function Description ÚÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³Pin³ Function ³ Description ³ ÃÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´ ³ 1 ³ Ground ³ Controller Logic Ground ³ ³ ³ ³ ³ ³ 2 ³ Not Connected ³ ³ ³ ³ ³ ³ ³ 3 ³ Disk 1 Write Protect Input ³ Ground this line to write protect disk 1 ³ ³ ³ ³ ³ ³ 4 ³ Disk 1 Ready Status ³ This line sinks 24 mA when disk 1 is ready³ ³ ³ ³ ³ ³ 5 ³ Disk 0 Write Protect Input ³ Ground this line to write protect disk 0 ³ ³ ³ ³ ³ ³ 6 ³ Disk 0 Ready Status ³ This line sinks 24 mA when disk 0 is ready³ ³ ³ ³ ³ ³ 7 ³ Disk 1 Write Protect Status³ This line sinks 24 mA when disk 1 is write³ ³ ³ ³ protected ³ ³ ³ ³ ³ ³ 8 ³ Not connected ³ ³ ³ ³ ³ ³ ³ 9 ³ Disk 0 Write Protect Status³ This line sinks 24 mA when disk 0 is write³ ³ ³ ³ protected ³ ³ ³ ³ ³ ³10 ³ +5 Vdc ³ This line provides 5 Vdc. This line is not³ ³ ³ ³ current protected. ³ ÀÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ +5V 10ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ DISK0 RDY ³ 6ÄÄÄÄ´<ÃÄÄÄÄÄÄXXXXÄÄÄÄ´ DISK1 RDY ³ 4ÄÄÄÄ´<ÃÄÄÄÄÄÄXXXXÄÄÄÄ´ DISK0 WP ³ 9ÄÄÄÄ´<ÃÄÄÄÄÄÄXXXXÄÄÄÄ´ DISK1 WP ³ 7ÄÄÄÄ´<ÃÄÄÄÄÄÄXXXXÄÄÄÄÙ WP DISK0 / N.O. 5ÄÄÄÄÄÄÄÄo/ oÄÄÄÄÄÄÄÄ¿ ³ WP DISK1 ³ / N.O. ³ 3ÄÄÄÄÄÄÄÄo/ oÄÄÄÄÄÄÄÄ´ ³ 1ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ ³ \³/ Figure 8-3. Status and Control Interface ========================================= ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ Appendix A AUTOCONFIGURE, CSR AND VECTOR ADDRESSES ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ A.1 Overview -------------- The following discussion presents the algorithm for assignment of floating addresses and vectors for all DEC operating systems. Bus addresses are discussed in subsection 3.3.2. A.2 Determining the CSR Address for Use With Autoconfigure ------------------------------------------------------------ The term Autoconfigure refers to a software utility that is run when the computer is bootstrapped. This utility finds and identifies I/O devices in the I/O page of system memory. Some devices (like the DM11) have fixed addresses reserved for them. Autoconfigure detects their presence by simply testing their standard address for a response. Specifically, the control/status register (CSR) address, which is usually the first register of the block, is tested. Addresses for those devices not assigned fixed numbers are selected from the floating CSR address space (760010-763776) of the Unibus input/output (I/O) page. This means that the presence or absence of floating devices will affect the assignment of addresses to other floating-address devices. Similarly, many devices have floating interrupt vector addresses. According to the DEC standard, vectors must be assigned in a specific sequence and the presence of one type of device will affect the correct assignment of vectors for other devices. The CSR address for a floating-address device is selected according to the algorithm used during autoconfigure. The algorithm is used in conjunction with a Device Table, Table A-1. Essentially, Autoconfigure checks each valid CSR address in the floating CSR address space for the presence of a device. Autoconfigure expects any devices installed in that space to be in the order specified by the Device Table. Also, the utility expects an eight-byte block to be reserved for each device that is not installed in the system. Each empty block tells Autoconfigure to look at the next valid address for the next device on the list. When a device is detected, a block of addresses is reserved for the device according to the number of registers it employs. The utility then looks at the next CSR for that device type. If there is a device there, it is assumed to be of the same type as the one before it and a block is reserved for that device. If there is no response at the next address, that space is reserved to indicate that there are no more devices of that type. Then the utility checks the CSR address (at the appropriate boundary) for the next device in the table. Table A-1. SYSGEN Device Table ÚÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÂÄÄÄÄÂÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄ¿ ³ ³ ³Number of³ Octal ³ ³ ³Number of³ Octal ³ ³Rank ³ Device ³Registers³Modulus³Rank³ Device ³Registers³Modulus³ ÃÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÅÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄ´ ³ 1 ³ DJ11 ³ 4 ³ 10 ³ 17 ³ Reserved³ 4 ³ 10 ³ ³ 2 ³ DH11 ³ 8 ³ 20 ³ 18 ³ RX11 *2 ³ 4 ³ 10 ³ ³ 3 ³ DQ11 ³ 4 ³ 10 ³ 18 ³ RX211 *2³ 4 ³ 10 ³ ³ 4 ³ DU11,DUV11³ 4 ³ 10 ³ 18 ³ RXV11 *2³ 4 ³ 10 ³ ³ 5 ³ DUP11 ³ 4 ³ 10 ³ 18 ³ RXV21 *2³ 4 ³ 10 ³ ³ 6 ³ LK11A ³ 4 ³ 10 ³ 19 ³ DR11-W ³ 4 ³ 10 ³ ³ 7 ³ DMC11 ³ 4 ³ 10 ³ 20 ³ DR11-B*3³ 4 ³ 10 ³ ³ 7 ³ DMR11 ³ 4 ³ 10 ³ 21 ³ DMP11 ³ 4 ³ 10 ³ ³ 8 ³ DZ11 *1 ³ 4 ³ 10 ³ 22 ³ DPV11 ³ 4 ³ 10 ³ ³ 8 ³ DZV11 ³ 4 ³ 10 ³ 23 ³ ISB11 ³ 4 ³ 10 ³ ³ 8 ³ DZS11 ³ 4 ³ 10 ³ 24 ³ DMV11 ³ 8 ³ 20 ³ ³ 8 ³ DZ32 ³ 4 ³ 10 ³ 25 ³ DEUNA *2³ 4 ³ 10 ³ ³ 9 ³ KMC11 ³ 4 ³ 10 ³ 26 ³ UDA50 *2³ 2 ³ 4 ³ ³ 10 ³ LPP11 ³ 4 ³ 10 ³ 27 ³ DMF32 ³ 16 ³ 40 ³ ³ 11 ³ VMV21 ³ 4 ³ 10 ³ 28 ³ KMS11 ³ 6 ³ 20 ³ ³ 12 ³ VMV31 ³ 8 ³ 20 ³ 29 ³ VS100 ³ 8 ³ 20 ³ ³ 13 ³ DWR70 ³ 4 ³ 10 ³ 30 ³ TU81 ³ 2 ³ 4 ³ ³ 14 ³ RL11 *2 ³ 4 ³ 10 ³ 31 ³ KMV11 ³ 8 ³ 20 ³ ³ 14 ³ RLV11 *2 ³ 4 ³ 10 ³ 32 ³ DHV11 ³ 8 ³ 20 ³ ³ 15 ³ LPA11-K *2³ 8 ³ 20 ³ 33 ³ DMZ32 ³ 16 ³ 40 ³ ³ 16 ³ KW11-C ³ 4 ³ 10 ³ 34 ³ CP132 ³ 16 ³ 40 ³ ÀÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÁÄÄÄÄÁÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÙ *1 DZ11-E and DZ11-F are treated as two DZ11s. *2 The first device of this type has a fixed address. Any extra devices have a floating address. *3 The first two devices of this type have a fixed address. Any extra devices have a floating address. In summary, there are four rules that pertain to the assignment of device addresses in floating address space: 1. Devices with floating addresses must be attached in the order in which they are listed in the Device Table, Table A-1. 2. The CSR address for a given device type is assigned on word boundaries according to the number of UNIBUS-accessible registers that the device has. The following table relates the number of device registers to possible word boundaries. ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³Device Registers³ Possible Boundaries ³ ÃÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´ ³ 1 ³ Any Word ³ ³ 2 ³ XXXXX0, XXXXX4 ³ ³ 3,4 ³ XXXXX0 ³ ³ 5,6,7,8 ³ XXXX00,XXXX20,XXXX40,XXXX60 ³ ³ 9 thru 16 ³ XXXX00,XXXX40 ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ The Autoconfigure utility inspects for a given device type only at one of the possible boundaries for that device. That is, the utility does not look for a DMF32 (16 registers) at an address that ends in 20. 3. An 8-byte gap must follow the register block of any installed device to indicate that there are no more of that type of device. This gap must start on the proper CSR address boundary for that type of device. 4. An 8-byte gap must be reserved in floating address space for each device type that is not installed in the current system. The gap must start on the proper word boundary for the type of device the gap represents. That is, a single DJ11 installed at 760010 would be followed by a gap starting at 760020 to show a change of device types. A gap to show that there are none of the next device on the list, a DH11, would begin at 760040, the next legal boundary for a DH11-type device. A.3 Determining the Vector Address for Use With Autoconfigure --------------------------------------------------------------- There is a floating vector address convention that is used for communications and other devices which interface with the Unibus. These vector addresses are assigned in order starting at 300 and proceeding upwards to 777. Table A-2 shows the assignment sequence. For a given system configuration, the device with the highest floating vector rank would be assigned to vector address 300. Additional devices of the same type would be assigned subsequent vector addresses according to the number of vectors required per device, and according to the starting boundary assigned to that device type. Table A-2.Priority Ranking for Floating Vector Addresses (starting at 3008 and proceeding upwards) ÚÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄ¿ ³ ³ ³Number ³ ³ ³ ³ ³ of ³ Octal ³ ³Rank³Device ³Vectors³Modulus³ ÃÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄ´ ³ 1 ³DC11 ³ 2 ³ 10 ³ ³ 1 ³TU58 ³ 2 ³ 10 ³ ³ 2 ³KL11 *1 ³ 2 ³ 10 ³ ³ 2 ³DL11-A *1 ³ 2 ³ 10 ³ ³ 2 ³DL11-B *1 ³ 2 ³ 10 ³ ³ 2 ³DLV11-J *1 ³ 8 ³ 40 ³ ³ 2 ³DLV11,DLV11-F *1 ³ 2 ³ 10 ³ ³ 3 ³DP11 ³ 2 ³ 10 ³ ³ 4 ³DM11-A ³ 2 ³ 10 ³ ³ 5 ³DN11 ³ 1 ³ 4 ³ ³ 6 ³DM11-BB/BA ³ 1 ³ 4 ³ ³ 7 ³DH11 modem cntrl ³ 1 ³ 4 ³ ³ 8 ³DR11-A, DRV11-B ³ 2 ³ 10 ³ ³ 9 ³DR11-C, DRV11 ³ 2 ³ 10 ³ ³10 ³PA611(readr/pnch)³ 4 ³ 20 ³ ³11 ³LPD11 ³ 2 ³ 10 ³ ³12 ³DT07 ³ 2 ³ 10 ³ ³13 ³DX11 ³ 2 ³ 10 ³ ³14 ³DL11-C to DLV11-F³ 2 ³ 10 ³ ³15 ³DJ11 ³ 2 ³ 10 ³ ³16 ³DH11 ³ 2 ³ 10 ³ ³17 ³VT40 ³ 4 ³ 20 ³ ³17 ³VSV11 ³ 4 ³ 10 ³ ³18 ³LPS11 ³ 6 ³ 40 ³ ³19 ³DQ11 ³ 2 ³ 10 ³ ³20 ³KW11-W, KWV11 ³ 2 ³ 10 ³ ³21 ³DU11, DUV11 ³ 2 ³ 10 ³ ³22 ³DUP11 ³ 2 ³ 10 ³ ³23 ³DV11 modem cntrl ³ 3 ³ 20 ³ ³24 ³LK11-A ³ 2 ³ 10 ³ ³25 ³DWUN ³ 2 ³ 10 ³ ³26 ³DMC11 ³ 2 ³ 10 ³ ³26 ³DMR11 ³ 2 ³ 10 ³ ³27 ³DZ11/DZS11/DZV11 ³ 2 ³ 10 ³ ³27 ³DZ32 ³ 2 ³ 10 ³ ³28 ³KMC11 ³ 2 ³ 10 ³ ³29 ³LPP11 ³ 2 ³ 10 ³ ³30 ³VMV21 ³ 2 ³ 10 ³ ³31 ³VMV31 ³ 2 ³ 10 ³ ³32 ³VTV01 ³ 2 ³ 10 ³ ³33 ³DWR70 ³ 2 ³ 10 ³ ³34 ³RL11/RLV11 *2 ³ 1 ³ 4 ³ ³35 ³TS11, TU80 *2 ³ 1 ³ 4 ³ ³36 ³LPA11-K ³ 2 ³ 10 ³ ³37 ³IP11/IP300 *2 ³ 1 ³ 4 ³ ³38 ³KW11-C ³ 2 ³ 10 ³ ³39 ³RX11 *2 ³ 1 ³ 4 ³ ³39 ³RX211 *2 ³ 1 ³ 4 ³ ³39 ³RXV11 *2 ³ 1 ³ 4 ³ ³39 ³RXV21 *2 ³ 1 ³ 4 ³ ³40 ³DR11-W ³ 1 ³ 4 ³ ³41 ³DR11-B *2 ³ 1 ³ 4 ³ ³42 ³DMP11 ³ 2 ³ 10 ³ ³43 ³DPV11 ³ 2 ³ 10 ³ ³44 ³ML11 *3 ³ 1 ³ 4 ³ ³45 ³ISB11 ³ 2 ³ 10 ³ ³46 ³DMV11 ³ 2 ³ 10 ³ ³47 ³DEUNA *2 ³ 1 ³ 4 ³ ³48 ³UDA50 *2 ³ 1 ³ 4 ³ ³49 ³DMF32 ³ 8 ³ 40 ³ ³50 ³KMS11 ³ 3 ³ 20 ³ ³51 ³PCL11-B ³ 2 ³ 10 ³ ³52 ³VS100 ³ 1 ³ 4 ³ ³53 ³Reserved ³ 1 ³ 4 ³ ³54 ³KMV11 ³ 2 ³ 10 ³ ³55 ³Reserved ³ 2 ³ 10 ³ ³56 ³IEX ³ 2 ³ 10 ³ ³57 ³DHV11 ³ 2 ³ 10 ³ ³58 ³DMZ32 ³ 6 ³ 20 ³ ³59 ³CP132 ³ 6 ³ 20 ³ ÃÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄ´ ³*1 A KL11 or DL11 used as a console, ³ ³ has a fixed vector. ³ ³*2 The first device of this type has a³ ³ fixed vector. Any extra devices ³ ³ have a floating vector. ³ ³*3 ML11 is a Massbus device which can ³ ³ connect to a UNIBUS via a bus ³ ³ adapter. ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ Vector addresses are assigned on the boundaries indicated in the modulus column of Table A-2. That is, if the modulus is 10, then the first vector address for that device must end with zero (XX0). If the modulus is 4, then the first vector address can end with zero or 4 (XX0, XX4). Vector addresses always fall on modulo 4 boundaries (XX0, XX4). That is, a vector address never ends in any number but four or zero. Consequently, if a device has two vectors and the first must start on a modulo 10 boundary, then, using 350 as a starting point, the vectors will be 350 and 354. A.4 A System Configuration Example ------------------------------------ Table A-3 contains an example of a system configuration that includes devices with fixed addresses and vectors, and floating addresses and/or vectors. Table A-4 shows how the device addresses for the floating address devices in Table A-3 were computed, including gaps. Table A-3. CSR and Vector Address Example ÚÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄ¿ ³Controller³Vector³ CSR ³ ÃÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄ´ ³ 1 UDA50 ³ 154 ³ 772150 ³ ³ 1 DZ11 ³ 300 ³ 760100 ³ ³ 1 UDA50 ³ 310 ³ 760354 ³ ³ 2 DHV11 ³ 320 ³ 760500 ³ ÀÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÙ Table A-4. Floating CSR Address Assignment Example ÚÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄ¿ ³ ³ ³ Octal ³ ³Installed³ Device ³ Address³ ÃÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄ´ ³ ³ DJ11 Gap ³ 760010 ³ ³ ³ DH11 Gap ³ 760020 ³ ³ ³ DQ11 Gap ³ 760030 ³ ³ ³ DU11 Gap ³ 760040 ³ ³ ³ DUP11 Gap ³ 760050 ³ ³ ³ LK11A Gap ³ 760060 ³ ³ ³ DMC11 Gap ³ 760070 ³ ³ ---->³ DZ11 ³ 760100 ³ ³ ³ Gap ³ 760110 ³ ³ ³ KMC11 Gap ³ 760120 ³ ³ ³ LPP11 Gap ³ 760130 ³ ³ ³ VMV21 Gap ³ 760140 ³ ³ ³ VMV31 Gap ³ 760150 ³ ³ ³ DWR70 Gap ³ 760170 ³ ³ ³ RL11 Gap ³ 760200 ³ ³ ³ LPA11-K Gap ³ 760220 ³ ³ ³ KW11-C Gap ³ 760230 ³ ³ ³ Reserved Gap ³ 760240 ³ ³ ³ RX11 Gap ³ 760250 ³ ³ ³ DR11-W Gap ³ 760260 ³ ³ ³ DR11-B Gap ³ 760270 ³ ³ ³ DMP11 Gap ³ 760300 ³ ³ ³ DPV11 Gap ³ 760310 ³ ³ ³ ISB11 Gap ³ 760320 ³ ³ ³ DMV11 Gap ³ 760340 ³ ³ ³ DEUNA Gap ³ 760350 ³ ³ ---->³ UDA50 (QD21) ³ 772150*³ ³ ---->³ UDA50 (QD21) ³ 760354 ³ ³ ³ Gap ³ 760360 ³ ³ ³ DMF32 Gap ³ 760400 ³ ³ ³ KMS11 Gap ³ 760420 ³ ³ ³ VS100 Gap ³ 761440 ³ ³ ³ TU81 Gap ³ 761450 ³ ³ ³ KMV11 Gap ³ 761460 ³ ³ ---->³ DHV11 ³ 761500 ³ ³ ---->³ DHV11 ³ 761520 ³ ³ ³ Gap ³ 761530 ³ ³ ³ DMZ32 Gap ³ 761540 ³ ³ ³ CP132 Gap ³ 761600 ³ ÃÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄ´ ³ * Fixed address ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ Appendix B PROM Removal and Replacement ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ B.1 Overview -------------- This appendix provides instructions for replacing the QD21's firmware PROM. B.2 Exchanging PROMs ---------------------- The QD21 firmware PROM is located in the socket at U44. Pry the existing PROM from its socket using an IC puller or an equivalent tool. The QD21 PROM is identified by the part numbers on top of the PROMs. Place the QD21 PROM in socket U44. Make certain that the PROM is firmly seated and that no pins are bent or misaligned. (If the two rows of PROM pins are too far apart to fit in the socket, grasp the PROM at its ends using your thumb and forefinger and bend one of the pin rows inward by pressing it against a table top or other flat surface.) PROM PCBA Number Location E65 U44 NOTE Firmware Revision Level E and above requires that jumpers S-T be set IN. See Table 4-2 for QD21 Jumper Definitions and Factory Configuration. ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³ Appendix C DISK DRIVE CONFIGURATION ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ C.1 Autoconfigure (Type Code 2) -------------------------------- Each ESDI drive is autoconfigured by using type code 2 in the NOVRAM parameters. By using type code 2, the drive is automatically configured for maximum storage capacity with all relevant drive parameters obtained directly from the drive itself. The controller uses ESDI commands to obtain drive information (drive must be connected and powered up) then calculates and programs the drive for the required settings. This procedure is performed for each MSCP on-line command from the host software. To allow the controller to program the drive for the correct number of sectors, each drive must have the PROGRAMMABLE SECTOR SIZE option enabled. If the drive does not support the PROGRAMMABLE SECTOR SIZE option, physically set the number of sectors as indicated (using the LIST KNOWN UNITS option) by using the appropriate jumpers or switches as described in the drive technical manual. C.2 Parameter Values (Type Code 1) ----------------------------------- If you are required to manually input the NOVRAM drive parameters, select type code 1. Type code 1 is used with drives that require split logicals (two logical drives per one physical), or to retain compatibility with a previously formatted drive used on a different Emulex controller. If you are using type code 1 values to retain compatibility, input the parameters used for the previously formatted drives. To obtain the correct values for split logicals (or reduced capacity drive), each physical drive initially needs to use a type code 2 value. Program the NOVRAM for type code 2, connect the drive(s), and use the internal diagnostic option LIST KNOWN UNITS. This displays the drive geometry information needed in programming the NOVRAM. For values not displayed with the LIST KNOWN UNITS command, use the default values in subsection 3.8, Drive Configuration Parameters. Once you collect these values, change the NOVRAM to type code 1 for each drive that requires manual configuration, then input the parameters using the collected values. You can mix type codes in the NOVRAM parameter if required. This means you can use autoconfigure (type code 2) for one or more physical drives, and then use supplied values (type code 1) for the remainder of the drives. Table C-1. DRIVE CONFIGURATION PARAMETER VALUES for QD21 ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ PARAMETER DRIVE NAME (1) (2) (2) (2) (2) (1) (1) (1) CDC FUJITSU HITACHI MAXTOR MAXTOR MAXTOR MICROPOLIS SIEMENS Wren III M2246E DK512-17 EXT4380 XT4380E XT-8760E 1350 1558 1300 Type Code 1 1 1 1 1 1(3) 1 1 1 Number of Units of this Type 1 1 1 1 1 1 1 1 1 Number of Sectors per Track 36 35 35 34 34 52 35 35 35 Number of Heads 9 10 10 15 15 15 8 15 12 Number of Cylinders 969 822 822 1224 1224 1632 1023 1224 1216 Number of Spare Sectors per Track 1 1 1 1 1 1 1 1 1 Number of Alternate Cylinders 2 2 2 2 2 2 2 2 2 Configuration Bits 6 5 13 13 13 4 14 14 8 Split Code 0 0 0 0 0 0 0 0 0 Starting Head Offset* - - - - - - - - - Removable Media Flag 0 0 0 0 0 0 0 0 0 Gap 0 Parameter 2318 3093 2314 3086 3086 4374 2316 2316 3344 Gap 1 Parameter 2827 3084 2827 6682 6682 6168 2827 2827 4112 Gap 2 Parameter 521 3337 6384 3095 3095 534 521 521 526 Cylinder Offset* - - - - - - - - - Spiral Offset 0 0 0 1 1 0 1 1 11 * Used only if Split Code is not 0. (1) Hard-Sectored Format Only (2) Soft-Sectored Format Only (3) Type Code 2 may also be used for maximum capacity with a programmable sector size jumper enabled on the drive. C.3 Recommended Drive Options ------------------------------ When using a type code of 2, the QD21 attempts to program the sector size via ESDI command. Some drives require this option to be enabled via jumpers or switches on the drive; check the drive manufacturer's manual for more information. If the drive is not programmable, the QD21 will use the number of sectors defined by the drive switch settings. C.3.1 Setting the Switches on the CDC Wren III ----------------------------------------------- The CDC Wren III is shipped from Emulex with the switches set as indicated, so that there are 36 sectors per track (hard-sectored) and the QD21 controls drive spin-up. If your Wren III was not purchased from Emulex, you may need to change the switch settings (see Figure C-1). Table C-3. CDC Wren III Switch Settings Hard-Sectored Format ÚÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ³SW1- ³ Position ³ Description ³ ÃÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´ ³ 1 ³ ON ³ Spindle control ³ ³ 2 ³ OFF ³ 36 sectors ³ ³ 3 ³ ON ³ ³ ³ 4 ³ OFF ³ ³ ÀÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ To change the switch settings for WREN III drives not purchased from Emulex, the front cover plate must first be removed. Use a TORX (six-splined) TX-10 screwdriver (or a small, flat-bladed one) to remove the two screws from each side of the drive. Remove the cover plate and set the switches. In some versions of this drive, the LED is attached to the front cover and there is a separate inner plate. Remove both plates after loosening the screws. After setting the switches, replace the plate(s) and the screws. If your version has the LED on the cover plate, take care that the LED wires are properly aligned with the two top openings.